| Commit message (Collapse) | Author | Age | Files | Lines |
| ... | |
| |
|
|
|
|
|
| |
We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.
llvm-svn: 165488
|
| |
|
|
|
|
|
|
| |
This class is used by LSR and a number of places in the codegen.
This is the first step in de-coupling LSR from TLI, and creating
a new interface in between them.
llvm-svn: 165455
|
| |
|
|
|
|
| |
SchedModel
llvm-svn: 165417
|
| |
|
|
| |
llvm-svn: 165402
|
| |
|
|
| |
llvm-svn: 165331
|
| |
|
|
|
|
| |
No functionality change.
llvm-svn: 165321
|
| |
|
|
| |
llvm-svn: 165267
|
| |
|
|
| |
llvm-svn: 165163
|
| |
|
|
|
|
|
|
|
|
|
| |
load and
multiple stores with a single load. We create the wide loads and stores (and their chains)
before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge
loads with a different chain. When that happened, the assumption that it is safe to RAUW
broke and a cycle was introduced.
llvm-svn: 165148
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
optimization
is not profitable in many cases because modern processors perform multiple stores
in parallel and merging stores prior to merging requires extra work. We handle two main cases:
1. Store of multiple consecutive constants:
q->a = 3;
q->4 = 5;
In this case we store a single legal wide integer.
2. Store of multiple consecutive loads:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
In this case we load/store either ilegal vector registers or legal wide integer registers.
llvm-svn: 165125
|
| |
|
|
|
|
| |
more detail.
llvm-svn: 165099
|
| |
|
|
|
|
|
| |
with just an insert point from the MachineBasicBlock and let
the location be updated as we access it.
llvm-svn: 165049
|
| |
|
|
|
|
|
| |
the add/sub case since in the case of multiplication you also have to check that
the operation in the larger type did not overflow.
llvm-svn: 165017
|
| |
|
|
|
|
| |
No functionality change.
llvm-svn: 164924
|
| |
|
|
| |
llvm-svn: 164911
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
llvm-svn: 164910
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
buildbots. Original commit message:
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
llvm-svn: 164890
|
| |
|
|
|
|
| |
operators to end of preceding line. No functional change intended.
llvm-svn: 164887
|
| |
|
|
|
|
| |
the varying arguments. No functional change.
llvm-svn: 164886
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
llvm-svn: 164885
|
| |
|
|
|
|
| |
See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
llvm-svn: 164768
|
| |
|
|
| |
llvm-svn: 164767
|
| |
|
|
|
|
|
| |
The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.
llvm-svn: 164725
|
| |
|
|
|
|
|
|
| |
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>
llvm-svn: 164662
|
| |
|
|
|
|
|
|
| |
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>
llvm-svn: 164657
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Provide interface in TargetLowering to set or get the minimum number of basic
blocks whereby jump tables are generated for switch statements rather than an
if sequence.
getMinimumJumpTableEntries() defaults to 4.
setMinimumJumpTableEntries() allows target configuration.
This patch changes the default for the Hexagon architecture to 5
as it improves performance on some benchmarks.
llvm-svn: 164628
|
| |
|
|
| |
llvm-svn: 164297
|
| |
|
|
| |
llvm-svn: 164264
|
| |
|
|
|
|
| |
LLVM_DELETED_FUNCTION.
llvm-svn: 164090
|
| |
|
|
| |
llvm-svn: 164087
|
| |
|
|
|
|
|
| |
- Preserve the original NOutVT during casting from vector to integer by
extracting vector elements.
llvm-svn: 164042
|
| |
|
|
| |
llvm-svn: 164000
|
| |
|
|
|
|
|
|
| |
umulo legalization.
Fixes PR13839
llvm-svn: 163856
|
| |
|
|
|
|
| |
closer to where they're needed.
llvm-svn: 163855
|
| |
|
|
|
|
|
|
| |
- Find a legal vector type before casting and extracting element from it.
- As the new vector type may have more than 2 elements, build the final
hi/lo pair by BFS pairing them from bottom to top.
llvm-svn: 163830
|
| |
|
|
|
|
|
|
|
|
|
| |
bitcast of fneg to integers
by xoring the high-bit. This fails if the source operand is a vector because we need to negate
each of the elements in the vector.
Fix rdar://12281066 PR13813.
llvm-svn: 163802
|
| |
|
|
|
|
|
|
|
|
|
| |
- BlockAddress has no support of BA + offset form and there is no way to
propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
support BA + offset addressing.
llvm-svn: 163743
|
| |
|
|
|
|
| |
already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG.
llvm-svn: 163736
|
| |
|
|
|
|
|
|
|
|
|
|
| |
behaviour (converting NaN values between float and double).
SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget);
should not be used when Val is not a simple constant (as the comment in
SelectionDAG.h indicates). This patch avoids using this function
when folding an unknown constant through a bitcast, where it cannot be
guaranteed that Val will be a simple constant.
llvm-svn: 163703
|
| |
|
|
|
|
|
|
| |
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"
No functional change. Update r163339.
llvm-svn: 163653
|
| |
|
|
|
|
| |
Factor similar code out of FNEG DAG combiner.
llvm-svn: 163587
|
| |
|
|
|
|
| |
This folding happens as early as possible for performance reasons, and to make sure it isn't foiled by other transforms (e.g. forming FMAs).
llvm-svn: 163519
|
| |
|
|
| |
llvm-svn: 163518
|
| |
|
|
|
|
| |
concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types.
llvm-svn: 163511
|
| |
|
|
| |
llvm-svn: 163494
|
| |
|
|
| |
llvm-svn: 163483
|
| |
|
|
|
|
| |
- this should fix PR13780
llvm-svn: 163370
|
| |
|
|
|
|
| |
No functional change.
llvm-svn: 163339
|
| |
|
|
| |
llvm-svn: 163309
|
| |
|
|
|
|
|
|
| |
allocations (allocas). Allocas are known to be
disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics).
llvm-svn: 163299
|