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* When fast iseling a GEP, accumulate the offset rather than emitting a series ofChad Rosier2011-11-171-11/+35
| | | | | | | | | | | | | ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs being: (1) If we can't materialize the large constant then we'll cause fast-isel to bail. (2) Too large of an offset can't be directly encoded in the ADD resulting in a MOV+ADD. Generally not a bad thing because otherwise we would have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix for that. (3) Conversely, too low of a threshold we'll miss opportunities to coalesce ADDs. rdar://10412592 llvm-svn: 144886
* Make sure to replace the chain properly when DAGCombining a ↵Eli Friedman2011-11-161-4/+17
| | | | | | LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393. llvm-svn: 144863
* Add fast-isel stats to determine who's doing all the work, the Chad Rosier2011-11-161-0/+7
| | | | | | target-independent selector or the target-specific selector. llvm-svn: 144833
* Fix the stats collection for fast-isel. The failed count was only accountingChad Rosier2011-11-161-5/+18
| | | | | | | | | for a single miss and not all predecessor instructions that get selected by the selection DAG instruction selector. This is still not exact (e.g., over states misses when folded/dead instructions are present), but it is a step in the right direction. llvm-svn: 144832
* CONCAT_VECTORS can have more than two operands. PR11389.Eli Friedman2011-11-161-22/+12
| | | | llvm-svn: 144768
* Add a couple asserts so it will be easier to debug if we accidentally pass ↵Eli Friedman2011-11-161-0/+4
| | | | | | indexed loads/stores to the legalizer. llvm-svn: 144767
* Rename MVT::untyped to MVT::Untyped to match similar nomenclature.Owen Anderson2011-11-161-2/+2
| | | | llvm-svn: 144747
* GEPs with all zero indices are trivially coalesced by fast-isel. For example,Chad Rosier2011-11-151-0/+5
| | | | | | | | | | | | | %arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0 %arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134 Prior to this commit, the GEP instruction that defines %arrayidx136 thought that %arrayidx135 was a trivial kill. The GEP that defines %arrayidx135 doesn't generate any code and thus %M0 gets folded into the second GEP. Thus, we need to look through GEPs with all zero indices. rdar://10443319 llvm-svn: 144730
* Added custom lowering for load->dec->store sequence in x86 when the EFLAGS ↵Pete Cooper2011-11-151-0/+5
| | | | | | | | | | | | registers is used by later instructions. Only done for DEC64m right now. Fixes <rdar://problem/6172640> llvm-svn: 144705
* Remove all remaining uses of Value::getNameStr().Benjamin Kramer2011-11-151-2/+2
| | | | llvm-svn: 144648
* Twinify GraphWriter a little bit.Benjamin Kramer2011-11-151-1/+1
| | | | llvm-svn: 144647
* Remove some unnecessary includes of PseudoSourceValue.h.Jay Foad2011-11-157-7/+0
| | | | llvm-svn: 144634
* Don't try to form pre/post-indexed loads/stores until after LegalizeDAG ↵Eli Friedman2011-11-122-11/+11
| | | | | | runs. Fixes PR11029. llvm-svn: 144438
* Some cleanup and bulletproofing for node replacement in LegalizeDAG. To ↵Eli Friedman2011-11-111-57/+59
| | | | | | | | maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still has uses after it is replaced (which can happen in rare cases due to CSE), we must revisit it. llvm-svn: 144432
* Use a bigger hammer to fix PR11314 by disabling the "forcing two-addressEvan Cheng2011-11-101-1/+5
| | | | | | | | | | | | | | | | instruction lower optimization" in the pre-RA scheduler. The optimization, rather the hack, was done before MI use-list was available. Now we should be able to implement it in a better way, perhaps in the two-address pass until a MI scheduler is available. Now that the scheduler has to backtrack to handle call sequences. Adding artificial scheduling constraints is just not safe. Furthermore, the hack is not taking all the other scheduling decisions into consideration so it's just as likely to pessimize code. So I view disabling this optimization goodness regardless of PR11314. llvm-svn: 144267
* Add check so we don't try to perform an impossible transformation. Fixes ↵Eli Friedman2011-11-091-1/+2
| | | | | | issue from PR11319. llvm-svn: 144216
* Speculatively revert commit 144124 (djg) in the hope that the 32 bitDuncan Sands2011-11-091-13/+3
| | | | | | | | | | | | | | dragonegg self-host buildbot will recover (it is complaining about object files differing between different build stages). Original commit message: Add a hack to the scheduler to disable pseudo-two-address dependencies in basic blocks containing calls. This works around a problem in which these artificial dependencies can get tied up in calling seqeunce scheduling in a way that makes the graph unschedulable with the current approach of using artificial physical register dependencies for calling sequences. This fixes PR11314. llvm-svn: 144188
* Add a hack to the scheduler to disable pseudo-two-address dependencies inDan Gohman2011-11-081-3/+13
| | | | | | | | | | basic blocks containing calls. This works around a problem in which these artificial dependencies can get tied up in calling seqeunce scheduling in a way that makes the graph unschedulable with the current approach of using artificial physical register dependencies for calling sequences. This fixes PR11314. llvm-svn: 144124
* Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.Lang Hames2011-11-081-0/+10
| | | | | | | | Add support for trimming constants to GetDemandedBits. This fixes some funky constant generation that occurs when stores are expanded for targets that don't support unaligned stores natively. llvm-svn: 144102
* Added invariant field to the DAG.getLoad method and changed all calls.Pete Cooper2011-11-0810-64/+85
| | | | | | When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses llvm-svn: 144100
* Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization ↵Eli Friedman2011-11-082-3/+25
| | | | | | | | doesn't get confused by CSE later on. Fixes PR11318. Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up. llvm-svn: 144055
* Revert r144034 while I try to track down a crash.Eli Friedman2011-11-071-19/+3
| | | | llvm-svn: 144044
* Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization ↵Eli Friedman2011-11-071-3/+19
| | | | | | doesn't get confused by CSE later on. Fixes PR11318. llvm-svn: 144034
* Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV()Richard Osborne2011-11-072-10/+16
| | | | | | and TargetLowering::BuildUDIV(). Fixes PR11283 llvm-svn: 143964
* Reapply r143206, with fixes. Disallow physical register lifetimesDan Gohman2011-11-034-518/+454
| | | | | | | across calls, and only check for nested dependences on the special call-sequence-resource register. llvm-svn: 143660
* build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-031-0/+23
| | | | llvm-svn: 143634
* An array of chars of length 8 will also cause the stack protector to be insertedBill Wendling2011-11-021-1/+1
| | | | | | | | into the function. Reflect that here so that the array will be placed next to the SP. <rdar://problem/10128329> llvm-svn: 143590
* Cleanup. Document. Make sure that this build_vector optimization only runs ↵Nadav Rotem2011-10-311-16/+29
| | | | | | before the op legalizer and that the used type is legal. llvm-svn: 143358
* Silence compiler warning.Benjamin Kramer2011-10-301-4/+4
| | | | llvm-svn: 143308
* Add a new DAGCombine optimization for BUILD_VECTOR.Nadav Rotem2011-10-291-0/+83
| | | | | | | If all of the inputs are zero/any_extended, create a new simple BV which can be further optimized by other BV optimizations. llvm-svn: 143297
* Revert r143206, as there are still some failing tests.Dan Gohman2011-10-294-436/+518
| | | | llvm-svn: 143262
* Reapply r143177 and r143179 (reverting r143188), with schedulerDan Gohman2011-10-284-518/+436
| | | | | | | | | fixes: Use a separate register, instead of SP, as the calling-convention resource, to avoid spurious conflicts with actual uses of SP. Also, fix unscheduling of calling sequences, which can be triggered by pseudo-two-address dependencies. llvm-svn: 143206
* Speculatively disable Dan's commits 143177 and 143179 to see ifDuncan Sands2011-10-284-407/+516
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | it fixes the dragonegg self-host (it looks like gcc is miscompiled). Original commit messages: Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. Delete #if 0 code accidentally left in. llvm-svn: 143188
* Delete #if 0 code accidentally left in.Dan Gohman2011-10-281-17/+0
| | | | llvm-svn: 143179
* Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUWDan Gohman2011-10-284-515/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. llvm-svn: 143177
* Don't crash on 128-bit sdiv by constant. Found by inspection.Eli Friedman2011-10-271-9/+6
| | | | llvm-svn: 143095
* Rename NonScalarIntSafe to something more appropriate.Lang Hames2011-10-261-4/+4
| | | | llvm-svn: 143080
* Simplify SplitVecRes_UnaryOp by removing all the code that isDuncan Sands2011-10-261-43/+5
| | | | | | | | | | | | | | | | | | | | trying to legalize the operand types when only the result type is required to be legalized - the type legalization machinery will get round to the operands later if they need legalizing. There can be a point to legalizing operands in parallel with the result: when this saves compile time or results in better code. There was only one case in which this was true: when the operand is also split, so keep the logic for that bit. As a result of this change, additional operand legalization methods may need to be introduced to handle nodes where the result and operand types can differ, like SIGN_EXTEND, but the testsuite doesn't contain any tests where this is the case. In any case, it seems better to require such methods (and die with an assert if they doesn't exist) than to quietly produce wrong code if we forgot to special case the node in SplitVecRes_UnaryOp. llvm-svn: 143026
* Don't use floating point to do an integer's job.Jakob Stoklund Olesen2011-10-261-4/+7
| | | | | | | | | | | This code makes different decisions when compiled into x87 instructions because of different rounding behavior. That caused phase 2/3 miscompares on 32-bit Linux when the phase 1 compiler was built with gcc (using x87), and the phase 2 compiler was built with clang (using SSE). This fixes PR11200. llvm-svn: 143006
* Remove a couple redundant checks.Eli Friedman2011-10-251-2/+0
| | | | llvm-svn: 142959
* Really unbreak CMake buildDouglas Gregor2011-10-241-3/+1
| | | | llvm-svn: 142822
* Unbreak CMake buildDouglas Gregor2011-10-241-0/+1
| | | | llvm-svn: 142821
* Delete the top-down "Latency" scheduler. Top-down scheduling doesn't handleDan Gohman2011-10-241-265/+0
| | | | | | | physreg dependencies, and upcoming codegen changes will require proper physreg dependence handling. llvm-svn: 142816
* Delete the Latency scheduling preference.Dan Gohman2011-10-241-2/+0
| | | | llvm-svn: 142815
* Change this overloaded use of Sched::Latency to be an overloadedDan Gohman2011-10-241-4/+4
| | | | | | use of Sched::ILP instead, as Sched::Latency is going away. llvm-svn: 142813
* Change the default scheduler from Latency to ILP, since LatencyDan Gohman2011-10-241-1/+1
| | | | | | is going away. llvm-svn: 142810
* Fix pr11194. When promoting and splitting integers we need to useNadav Rotem2011-10-211-3/+12
| | | | | | | | ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize. SetCC return type needs to be legalized via PromoteTargetBoolean. llvm-svn: 142660
* 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC ↵Nadav Rotem2011-10-213-14/+17
| | | | | | | | type. 2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1. llvm-svn: 142648
* Remove a now dead function, fixing -Wunused-function warnings fromChandler Carruth2011-10-211-20/+0
| | | | | | Clang. llvm-svn: 142631
* Delete the list-tdrr scheduler. Top-down schedulers are going awayDan Gohman2011-10-201-203/+11
| | | | | | because they don't support physical register dependencies. llvm-svn: 142620
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