| Commit message (Collapse) | Author | Age | Files | Lines |
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- Be consistent when referring to MachineBasicBlocks: BB#0.
- Be consistent when referring to virtual registers: %reg1024.
- Be consistent when referring to unknown physical registers: %physreg10.
- Be consistent when referring to known physical registers: %RAX
- Be consistent when referring to register 0: %reg0
- Be consistent when printing alignments: align=16
- Print jump table contents.
- Don't print host addresses, in general.
- and various other cleanups.
llvm-svn: 85682
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that uses this information knows to behave conservatively.
llvm-svn: 85654
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llvm-svn: 85648
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results. This works around a problem affecting targets which rely on
MVT::Flag to handle physical register defs.
llvm-svn: 85638
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llvm-svn: 85556
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llvm-svn: 85536
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*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.
llvm-svn: 85530
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bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
llvm-svn: 85517
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llvm-svn: 85436
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chains have no users, they can't be predecessors of the condition.
llvm-svn: 85394
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recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.
llvm-svn: 85369
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llvm-svn: 85361
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MachineLICM and other things which run before LiveVariables is run.
llvm-svn: 85360
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llvm-svn: 85351
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llvm-svn: 85325
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llvm-svn: 85323
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llvm-svn: 85296
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returns true if the fp immediate can be natively codegened by target.
llvm-svn: 85281
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(assembler,asmprinter, bc reader+writer) and document it. Codegen
currently aborts on it.
llvm-svn: 85274
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thread safe either.
llvm-svn: 85253
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do anything than return "I don't know" at the moment.
llvm-svn: 85189
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Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.
llvm-svn: 85176
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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the scale overflows pointer-sized arithmetic. This fixes PR5281.
llvm-svn: 84954
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llvm-svn: 84806
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transform.
llvm-svn: 84683
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stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot
move above a store of spill slot #2.
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.
llvm-svn: 84424
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PseudoSourceValue.
llvm-svn: 84411
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llvm-svn: 84321
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necessarily fixed. Only those will negative frame indices are "fixed."
llvm-svn: 84315
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llvm-svn: 84311
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llvm-svn: 84300
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llvm-svn: 84299
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llvm-svn: 84279
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llvm-svn: 84247
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llvm-svn: 84193
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so get rid of eh.selector.i64 and rename eh.selector.i32 to eh.selector.
Likewise for eh.typeid.for. This aligns us with gcc, which always uses a
32 bit value for the selector on all platforms. My understanding is that
the register allocator used to assert if the selector intrinsic size didn't
match the pointer size, and this was the reason for introducing the two
variants. However my testing shows that this is no longer the case (I
fixed some bugs in selector lowering yesterday, and some more today in the
fastisel path; these might have caused the original problems).
llvm-svn: 84106
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s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g
llvm-svn: 84054
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truncating an SDValue (depending on whether the target
type is bigger or smaller than the value's type); or zero
extending or truncating it. Use it in a few places (this
seems to be a popular operation, but I only modified cases
of it in SelectionDAGBuild). In particular, the eh_selector
lowering was doing this wrong due to a repeated rather than
inverted test, fixed with this change.
llvm-svn: 84027
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llvm-svn: 83921
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compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%
llvm-svn: 83824
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into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.
llvm-svn: 83699
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since it won't do any folding. This will help avoid some inconvenient
casting.
llvm-svn: 83698
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it isn't needed in the ScheduleDAGSDNodes schedulers.
llvm-svn: 83691
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alloca or llvm.dbg.declare location.
While recording beginning of a function, use scope info from the first location entry instead of just relying on first location entry itself.
llvm-svn: 83684
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similar to getTargetExtractSubreg.
llvm-svn: 83564
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This is not yet enabled.
llvm-svn: 83400
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This code is not yet enabled.
llvm-svn: 83349
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slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
llvm-svn: 83189
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