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* Expand small memmovs using inline code. Set the X86 threshold for expandingDan Gohman2008-05-291-5/+73
| | | | | | memmove to a more plausible value, now that it's actually being used. llvm-svn: 51696
* Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.Evan Cheng2008-05-291-3/+10
| | | | llvm-svn: 51667
* Fix some constructs that gcc-4.4 warns about.Duncan Sands2008-05-271-1/+1
| | | | llvm-svn: 51591
* Add #includes to make some dependencies explicit.Dan Gohman2008-05-231-0/+1
| | | | llvm-svn: 51496
* Generalize the new code in instcombine's ComputeNumSignBits for handlingDan Gohman2008-05-231-7/+13
| | | | | | | and/or to handle more cases (such as this add-sitofp.ll testcase), and port it to selectiondag's ComputeNumSignBits. llvm-svn: 51469
* Use isSingleValueType instead of isFirstClassType toDan Gohman2008-05-231-2/+2
| | | | | | exclude struct and array types. llvm-svn: 51460
* Port the fix for the select operator from instcombine'sDan Gohman2008-05-201-2/+2
| | | | | | ComputeNumSignBits to SelectionDAG's ComputeNumSignBits. llvm-svn: 51348
* Code simplification.Dan Gohman2008-05-201-6/+4
| | | | llvm-svn: 51345
* If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source ↵Evan Cheng2008-05-161-3/+6
| | | | | | is a v1* vector. llvm-svn: 51192
* Silence the compiler warning differently. TheDuncan Sands2008-05-161-1/+1
| | | | | | original method caused gcc-4.2 to complain. llvm-svn: 51186
* Actually scalarize the operand to BIT_CONVERT instead of asking someone to doNate Begeman2008-05-151-1/+2
| | | | | | something with a v1 type. llvm-svn: 51160
* IR support for extractvalue and insertvalue instructions. Also, beginDan Gohman2008-05-151-0/+13
| | | | | | moving toward making structs and arrays first-class types. llvm-svn: 51157
* Make use of vector load and store operations to implement memcpy, memmove, ↵Evan Cheng2008-05-151-90/+135
| | | | | | and memset. Currently only X86 target is taking advantage of these. llvm-svn: 51140
* Use a better idiom to silence compiler warnings.Evan Cheng2008-05-141-20/+5
| | | | llvm-svn: 51131
* Really silence compiler warnings.Evan Cheng2008-05-141-2/+2
| | | | llvm-svn: 51126
* Really silence compiler warnings.Evan Cheng2008-05-141-5/+20
| | | | llvm-svn: 51123
* Silence some compiler warnings.Evan Cheng2008-05-143-5/+13
| | | | llvm-svn: 51115
* When bit-twiddling CondCode values for integer comparisons producesDan Gohman2008-05-141-0/+1
| | | | | | SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ. llvm-svn: 51112
* Whitespace cleanups.Dan Gohman2008-05-141-1/+1
| | | | llvm-svn: 51089
* Instead of a vector load, shuffle and then extract an element. Load the ↵Evan Cheng2008-05-132-33/+88
| | | | | | | | | | | element from address with an offset. pshufd $1, (%rdi), %xmm0 movd %xmm0, %eax => movl 4(%rdi), %eax llvm-svn: 51026
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-132-13/+11
| | | | | | | several things that were neither in an anonymous namespace nor static but not intended to be global. llvm-svn: 51017
* Teach Legalize how to scalarize VSETCCNate Begeman2008-05-121-0/+10
| | | | | | Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next. llvm-svn: 51009
* Xform bitconvert(build_pair(load a, load b)) to a single load if the load ↵Evan Cheng2008-05-122-1/+50
| | | | | | locations are at the right offset from each other. llvm-svn: 51008
* Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can ↵Evan Cheng2008-05-121-0/+68
| | | | | | make use of it. llvm-svn: 50991
* Add support for vicmp/vfcmp codegen, more legalize support coming.Nate Begeman2008-05-123-0/+98
| | | | | | This is necessary to unbreak the build. llvm-svn: 50988
* Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!Dan Gohman2008-05-121-0/+1
| | | | llvm-svn: 50967
* Turn StripPointerCast() into a methodAnton Korobeynikov2008-05-071-2/+2
| | | | llvm-svn: 50836
* Fix a bug in the ComputeMaskedBits logic for multiply.Dan Gohman2008-05-071-2/+2
| | | | llvm-svn: 50793
* Make StripPointerCast a common function (should we mak it method of Value ↵Anton Korobeynikov2008-05-061-3/+2
| | | | | | instead?) llvm-svn: 50775
* Make several variable declarations static.Dan Gohman2008-05-061-2/+2
| | | | llvm-svn: 50696
* Instead of enumerating each opcode that isn't handled thatDan Gohman2008-05-061-11/+1
| | | | | | | ComputeMaskedBits handles, just use a 'default:'. This avoids TargetLowering's list getting out of date with SelectionDAG's. llvm-svn: 50693
* Correct the value of LowBits in srem and urem handling inDan Gohman2008-05-061-3/+3
| | | | | | ComputeMaskedBits. llvm-svn: 50692
* Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang2008-05-054-37/+100
| | | | llvm-svn: 50663
* Fix a mistake in the computation of leading zeros for udiv.Dan Gohman2008-05-021-3/+5
| | | | llvm-svn: 50591
* Fix a typo in a comment.Dan Gohman2008-05-021-1/+1
| | | | llvm-svn: 50562
* Use push_back(...) instead of resize(1, ...), per review feedback.Dan Gohman2008-05-021-2/+2
| | | | llvm-svn: 50561
* Fix uninitialized uses of the FPC variable.Dan Gohman2008-05-011-2/+2
| | | | llvm-svn: 50558
* don't randomly miscompile seto/setuo just because we are in Chris Lattner2008-05-011-4/+4
| | | | | | | | | ffastmath mode. This fixes rdar://5902801, a miscompilation of gcc.dg/builtins-8.c. Bill, please pull this into Tak. llvm-svn: 50523
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-6/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
* Fix custom target lowering for zero/any/sign_extend: make sure thatScott Michel2008-04-301-5/+3
| | | | | | | DAG.UpdateNodeOperands() is called before (not after) the call to TLI.LowerOperation(). llvm-svn: 50461
* Use std::set instead of std::priority_queue for the RegReductionPriorityQueue. Roman Levenstein2008-04-291-44/+29
| | | | | | | | | | | | | | This removes the existing bottleneck related to the removal of elements from the middle of the queue. Also fixes a subtle bug in ScheduleDAGRRList::CapturePred: It was updating the state of the SUnit before removing it. As a result, the comparison operators were working incorrectly and this SUnit could not be removed from the queue properly. Reviewed by Evan and Dan. Approved by Dan. llvm-svn: 50412
* make the vector conversion magic handle multiple results.Chris Lattner2008-04-291-7/+16
| | | | | | | | | | | | | | | | | | | | | We now compile test2/test3 to: _test2: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End addps %xmm1, %xmm0 ret _test3: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End paddd %xmm1, %xmm0 ret as expected. llvm-svn: 50389
* add support for multiple return values in inline asm. This is a step Chris Lattner2008-04-291-12/+19
| | | | | | | | | | | | | | | | | | towards PR2094. It now compiles the attached .ll file to: _sad16_sse2: movslq %ecx, %rax ## InlineAsm Start %ecx %rdx %rax %rax %r8d %rdx %rsi ## InlineAsm End ## InlineAsm Start set %eax ## InlineAsm End ret which is pretty decent for a 3 output, 4 input asm. llvm-svn: 50386
* Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling ↵Evan Cheng2008-04-281-2/+12
| | | | | | | | | | | | | | units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs: c1, f1 = CopyToReg c2, f2 = CopyToReg c3 = TokenFactor c1, c2 ... = user c3, ..., f2 Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes. llvm-svn: 50376
* Evan pointed out that folding sext to zext may not be correctDan Gohman2008-04-281-1/+2
| | | | | | if the zext is not legal. llvm-svn: 50368
* Delete an unused constructor.Dan Gohman2008-04-281-3/+0
| | | | llvm-svn: 50367
* Add a comment to CreateRegForValue that clarifies the handling ofDan Gohman2008-04-281-0/+4
| | | | | | aggregate types. llvm-svn: 50366
* Rewrite the comments for RegsForValue and its members, andDan Gohman2008-04-281-20/+30
| | | | | | reorder some of the members for clarity. llvm-svn: 50365
* Don't call size() on each iteration of the loop.Dan Gohman2008-04-281-2/+2
| | | | llvm-svn: 50361
* Fix the SVOffset values for loads and stores produced byDan Gohman2008-04-281-18/+20
| | | | | | | memcpy/memset expansion. It was a bug for the SVOffset value to be used in the actual address calculations. llvm-svn: 50359
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