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* Remove dead codeAnton Korobeynikov2007-03-271-82/+46
| | | | llvm-svn: 35380
* Split big monster into small helpers. No functionality change.Anton Korobeynikov2007-03-271-190/+285
| | | | llvm-svn: 35379
* SDISel does not preserve all, it changes CFG and other info.Evan Cheng2007-03-271-1/+0
| | | | llvm-svn: 35376
* SIGN_EXTEND_INREG requires one extra operand, a ValueType node.Evan Cheng2007-03-261-2/+6
| | | | llvm-svn: 35350
* First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov2007-03-251-176/+249
| | | | | | strategy, emit JT's where possible. llvm-svn: 35338
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
| | | | | | CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll llvm-svn: 35332
* implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner2007-03-251-0/+2
| | | | | | CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll llvm-svn: 35327
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35324
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-252-24/+28
| | | | | | not just the first letter. No functionality change. llvm-svn: 35322
* don't rely on ADLChris Lattner2007-03-241-1/+1
| | | | llvm-svn: 35299
* Adjust offset to compensate for big endian machines.Evan Cheng2007-03-241-7/+5
| | | | llvm-svn: 35293
* Make sure SEXTLOAD of the specific type is supported on the target.Evan Cheng2007-03-231-0/+4
| | | | llvm-svn: 35289
* Also replace uses of SRL if that's also folded during ReduceLoadWidth().Evan Cheng2007-03-231-1/+8
| | | | llvm-svn: 35286
* A couple of bug fixes for reducing load width xform:Evan Cheng2007-03-231-7/+16
| | | | | | | 1. Address offset is in bytes. 2. Make sure truncate node uses are replaced with new load. llvm-svn: 35274
* Change uses of Function::front to Function::getEntryBlock for readability.Dan Gohman2007-03-221-1/+1
| | | | llvm-svn: 35265
* More opportunities to reduce load size.Evan Cheng2007-03-221-45/+101
| | | | llvm-svn: 35254
* repair x86 performance, dejagnu problems from previous changeDale Johannesen2007-03-211-2/+2
| | | | llvm-svn: 35245
* fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))Evan Cheng2007-03-211-6/+24
| | | | llvm-svn: 35239
* do not share old induction variables when this would result in invalidDale Johannesen2007-03-201-0/+16
| | | | | | instructions (that would have to be split later) llvm-svn: 35227
* Fix some VC++ warnings.Jeff Cohen2007-03-201-0/+1
| | | | llvm-svn: 35224
* Code clean up.Lauro Ramos Venancio2007-03-201-23/+20
| | | | llvm-svn: 35220
* Minor bug.Evan Cheng2007-03-201-1/+2
| | | | llvm-svn: 35219
* CopyToReg source operand can be a physical register.Lauro Ramos Venancio2007-03-201-3/+19
| | | | llvm-svn: 35213
* Use SmallSet instead of std::set.Evan Cheng2007-03-171-1/+1
| | | | llvm-svn: 35133
* If sdisel has decided to sink GEP index expression into any BB. Replace all usesEvan Cheng2007-03-171-22/+37
| | | | | | in that BB. llvm-svn: 35132
* Turn on GEP index sinking by default.Evan Cheng2007-03-161-7/+0
| | | | llvm-svn: 35127
* Stupid bug.Evan Cheng2007-03-161-1/+1
| | | | llvm-svn: 35126
* Sink a binary expression into its use blocks if it is a loop invariantEvan Cheng2007-03-161-0/+92
| | | | | | | computation used as GEP indexes and if the expression can be folded into target addressing mode of GEP load / store use types. llvm-svn: 35123
* Added isLegalAddressExpression hook to test if the given expression can beEvan Cheng2007-03-161-0/+8
| | | | | | folded into target addressing mode for the given type. llvm-svn: 35121
* Estimate a cost using the possible number of scratch registers required and useEvan Cheng2007-03-141-9/+47
| | | | | | | | | | it as a late BURR scheduling tie-breaker. Intuitively, it's good to push down instructions whose results are liveout so their long live ranges won't conflict with other values which are needed inside the BB. Further prioritize liveout instructions by the number of operands which are calculated within the BB. llvm-svn: 35109
* Try schedule def + use closer whne Sethi-Ullman numbers are the same.Evan Cheng2007-03-131-6/+38
| | | | | | | | | | | | | | | | | | | | | e.g. t1 = op t2, c1 t3 = op t4, c2 and the following instructions are both ready. t2 = op c3 t4 = op c4 Then schedule t2 = op first. i.e. t4 = op c4 t2 = op c3 t1 = op t2, c1 t3 = op t4, c2 This creates more short live intervals which work better with the register allocator. llvm-svn: 35089
* More flexible TargetLowering LSR hooks for testing whether an immediate is a ↵Evan Cheng2007-03-121-3/+13
| | | | | | legal target address immediate or scale. llvm-svn: 35076
* implement support for floating point constants used as inline asm memory ↵Chris Lattner2007-03-081-2/+7
| | | | | | operands. llvm-svn: 35033
* make this fail even in non-assert builds.Chris Lattner2007-03-081-2/+4
| | | | llvm-svn: 35025
* Refactoring of formal parameter flags. Enable properly use ofAnton Korobeynikov2007-03-072-31/+31
| | | | | | zext/sext/aext stuff. llvm-svn: 35008
* Avoid combining indexed load further.Evan Cheng2007-03-071-8/+14
| | | | llvm-svn: 35005
* big endian 32-bit systems (e.g. ppc32) want to return the high reg first, notChris Lattner2007-03-061-0/+5
| | | | | | | the lo-reg first. This is fallout from my ppc calling conv change yesterday, it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx llvm-svn: 34983
* Enumerate SDISel formal parameter attributes. Make use of newAnton Korobeynikov2007-03-061-22/+24
| | | | | | enumeration. llvm-svn: 34960
* Unbreak VC++ build.Jeff Cohen2007-03-051-1/+1
| | | | llvm-svn: 34917
* fold away addc nodes when we know there cannot be a carry-out.Chris Lattner2007-03-042-8/+28
| | | | llvm-svn: 34913
* generalizeChris Lattner2007-03-041-5/+9
| | | | llvm-svn: 34910
* canonicalize constants to the RHS of addc/adde. If nothing uses the carry ↵Chris Lattner2007-03-041-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | out of addc, turn it into add. This allows us to compile: long long test(long long A, unsigned B) { return (A + ((long long)B << 32)) & 123; } into: _test: movl $123, %eax andl 4(%esp), %eax xorl %edx, %edx ret instead of: _test: xorl %edx, %edx movl %edx, %eax addl 4(%esp), %eax ;; add of zero andl $123, %eax ret llvm-svn: 34909
* eliminate some ops if they have an undef RHSChris Lattner2007-03-041-0/+2
| | | | llvm-svn: 34908
* Fix CodeGen/Generic/fpowi-promote.ll and PR1239Chris Lattner2007-03-031-0/+12
| | | | llvm-svn: 34893
* Add an expand action for ISD label which just deletes the label.Chris Lattner2007-03-031-0/+3
| | | | | | This "fixes" PR1238. llvm-svn: 34890
* Lower eh filter intrinsic.Jim Laskey2007-03-011-1/+4
| | | | llvm-svn: 34802
* Chain is on second operand.Jim Laskey2007-02-281-4/+23
| | | | llvm-svn: 34759
* MERGE_VALUES unnecessary.Jim Laskey2007-02-281-12/+4
| | | | llvm-svn: 34750
* add methods for analysis of call results and return nodes.Chris Lattner2007-02-281-12/+42
| | | | llvm-svn: 34738
* add methods to analyze calls and formals.Chris Lattner2007-02-281-0/+34
| | | | llvm-svn: 34736
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