| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not. gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks. There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it. PR 5125. Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now. I'm not making it any
worse. If anyone is inspired I think you can find all
the right places from this patch.
llvm-svn: 107506
|
| |
|
|
| |
llvm-svn: 107490
|
| |
|
|
| |
llvm-svn: 107489
|
| |
|
|
| |
llvm-svn: 107451
|
| |
|
|
| |
llvm-svn: 107393
|
| |
|
|
|
|
| |
doing the work manually.
llvm-svn: 107384
|
| |
|
|
|
|
|
| |
from a Value to a Type, because it doesn't actually care about
the Value.
llvm-svn: 107383
|
| |
|
|
|
|
|
| |
available in a register. This is pretty primitive, but it reduces the
number of instructions in common testcases by 4%.
llvm-svn: 107380
|
| |
|
|
| |
llvm-svn: 107377
|
| |
|
|
|
|
|
| |
SelectionDAGBuilder::getValue into a helper function, with fixes to
use DenseMaps safely.
llvm-svn: 107371
|
| |
|
|
|
|
| |
value if the search fails.
llvm-svn: 107368
|
| |
|
|
| |
llvm-svn: 107321
|
| |
|
|
|
|
| |
this could break something (but doesn't seem to).
llvm-svn: 107295
|
| |
|
|
| |
llvm-svn: 107282
|
| |
|
|
| |
llvm-svn: 107279
|
| |
|
|
|
|
|
|
|
| |
of getPhysicalRegisterRegClass with it.
If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.
llvm-svn: 107140
|
| |
|
|
| |
llvm-svn: 107127
|
| |
|
|
|
|
|
| |
can't be changed arbitrarily by the DAGCombiner without checking if it is
running after legalization.
llvm-svn: 107097
|
| |
|
|
|
|
|
|
| |
have to be registers, per gcc documentation. This affects
the logic for determining what "g" should lower to. PR 7393.
A couple of existing testcases are affected.
llvm-svn: 107079
|
| |
|
|
|
|
| |
This produces terrible but correct code.
llvm-svn: 106952
|
| |
|
|
| |
llvm-svn: 106901
|
| |
|
|
|
|
|
|
|
| |
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
llvm-svn: 106893
|
| |
|
|
|
|
| |
is not used. Spotted by gcc-4.6.
llvm-svn: 106854
|
| |
|
|
| |
llvm-svn: 106836
|
| |
|
|
| |
llvm-svn: 106828
|
| |
|
|
| |
llvm-svn: 106827
|
| |
|
|
|
|
|
| |
original SDNode. This is badness. Also, this function allows one SDNode to point
multiple flags to another SDNode. Badness as well.
llvm-svn: 106793
|
| |
|
|
|
|
| |
which trivially fold away.
llvm-svn: 106765
|
| |
|
|
|
|
| |
as many tests as possible.
llvm-svn: 106749
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
when the condition is constant. This optimization shouldn't be
necessary, because codegen shouldn't be able to find dead control
paths that the IR-level optimizer can't find. And it's undesirable,
because it encourages bugpoint to leave "br i1 false" branches
in its output. And it wasn't updating the CFG.
I updated all the tests I could, but some tests are too reduced
and I wasn't able to meaningfully preserve them.
llvm-svn: 106748
|
| |
|
|
| |
llvm-svn: 106746
|
| |
|
|
|
|
| |
case where the bit mask has exactly one bit.
llvm-svn: 106716
|
| |
|
|
|
|
|
| |
into the same node, but with different non-memory operands, we need to replace
the memory operands after it's finished morphing.
llvm-svn: 106643
|
| |
|
|
|
|
| |
DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
llvm-svn: 106634
|
| |
|
|
|
|
|
|
| |
atomic intrinsics, either because the use locking instructions for the
atomics, or because they perform the locking directly. Add support in the
DAG combiner to fold away the fences.
llvm-svn: 106630
|
| |
|
|
|
|
| |
SmallVector, and other SmallVector simplifications.
llvm-svn: 106452
|
| |
|
|
| |
llvm-svn: 106423
|
| |
|
|
|
|
|
|
|
|
| |
Split the code for materializing a value out of
SelectionDAGBuilder::getValue into a helper function, so that it can
be used in other ways. Add a new getNonRegisterValue function which
uses it, for use in code which doesn't want a CopyFromReg even
when FuncMap.ValueMap already has an entry for it.
llvm-svn: 106422
|
| |
|
|
| |
llvm-svn: 106415
|
| |
|
|
|
|
|
| |
the LocalValueMap, to make it more flexible when fast-isel isn't
proceding straight top-down.
llvm-svn: 106414
|
| |
|
|
|
|
| |
on calls and similar instructions.
llvm-svn: 106353
|
| |
|
|
| |
llvm-svn: 106342
|
| |
|
|
| |
llvm-svn: 106324
|
| |
|
|
|
|
|
|
|
|
| |
entries used by llvm-gcc. *_[U]MIN and such can be added later if needed.
This enables the front ends to simplify handling of the atomic intrinsics by
removing the target-specific decision about which targets can handle the
intrinsics.
llvm-svn: 106321
|
| |
|
|
| |
llvm-svn: 106286
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
switch from this:
if (TimePassesIsEnabled) {
NamedRegionTimer T(Name, GroupName);
do_something();
} else {
do_something(); // duplicate the code, this time without a timer!
}
to this:
{
NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled);
do_something();
}
llvm-svn: 106285
|
| |
|
|
|
|
| |
the old one.
llvm-svn: 106284
|
| |
|
|
|
|
|
| |
Don't replace the old DbgInfo with a new one when clear() on the
old one is sufficient.
llvm-svn: 106283
|
| |
|
|
|
|
| |
SDNode *, since it doesn't care about the ResNo value.
llvm-svn: 106282
|
| |
|
|
| |
llvm-svn: 106279
|