| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 90669
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llvm-svn: 90668
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llvm-svn: 90637
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instead of SelectionDAGISel.cpp.
llvm-svn: 90636
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and that Instruction only. Implement this by setting the "current debug position"
back to Unknown after processing each instruction.
llvm-svn: 90632
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architectures that LLVM targets, because they don't use this code.
llvm-svn: 90564
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Pointed out by Javier Martinez (who also provided a patch). Since
this logic is not used on (for example) x86, I guess nobody noticed.
Tested by generating SHL, SRL, SRA on various choices of i64 for all
possible shift amounts, and comparing with gcc. Since I did this on
x86-32, I had to force the use of ExpandShiftWithUnknownAmountBit.
What I'm saying here is that I don't have a testcase I can add to the
repository.
llvm-svn: 90482
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doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.
llvm-svn: 90423
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llvm-svn: 90415
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Patch by Howard Hinnant!
llvm-svn: 90365
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framework omits differentiated edge sources in the case where the labels
are empty strings.
llvm-svn: 90254
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llvm-svn: 90253
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llvm-svn: 90252
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llvm-svn: 90136
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llvm-svn: 90134
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llvm-svn: 90133
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vectors for
divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.
llvm-svn: 90108
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Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
llvm-svn: 89711
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llvm-svn: 89683
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SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp.
llvm-svn: 89681
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in this file.
llvm-svn: 89675
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FunctionLoweringInfo.cpp.
llvm-svn: 89674
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llvm-svn: 89671
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of SelectionDAGBuild.h/cpp into its own files, to help separate
general lowering logic from SelectionDAG-specific lowering logic.
llvm-svn: 89667
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llvm-svn: 89536
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and stores, handle the case where the element size is not
a valid target type correctly (PPC).
llvm-svn: 89521
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and support for blockaddresses in x86-32 PIC mode.
llvm-svn: 89506
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which was an expensive checks failure due to a bug in the checking. This
patch in essence reverts the original fix for PR3393, and refixes it by a
tweak to the way expensive checking is done.
llvm-svn: 89454
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tail call has been encountered.
llvm-svn: 89444
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unconditional branches or fallthroghes. Instcombine/SimplifyCFG
should be simplifying branches with known conditions.
This fixes some problems caused by these transformations not
updating the MachineBasicBlock CFG.
llvm-svn: 89017
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llvm-svn: 88953
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llvm-svn: 88737
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llvm-svn: 88672
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PPC is such a target; make it work.
llvm-svn: 87060
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slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
llvm-svn: 87022
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StringsEqualNoCase (from StringExtras.h) to it.
llvm-svn: 87020
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make it permanent and remove old way of inserting intrinsics to encode debug info for line number and scopes.
llvm-svn: 87014
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in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
llvm-svn: 86876
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constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements. In practice any target with
8-bit bytes must support i8 *as data*). 7320806 (partial).
llvm-svn: 86751
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llvm-svn: 86748
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just throw them away.
llvm-svn: 86678
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llvm-svn: 86601
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llvm-svn: 86600
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llvm-svn: 86522
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llvm-svn: 86384
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llvm-svn: 86354
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llvm-svn: 86340
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values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
llvm-svn: 86324
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llvm-svn: 86151
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- Be consistent when referring to MachineBasicBlocks: BB#0.
- Be consistent when referring to virtual registers: %reg1024.
- Be consistent when referring to unknown physical registers: %physreg10.
- Be consistent when referring to known physical registers: %RAX
- Be consistent when referring to register 0: %reg0
- Be consistent when printing alignments: align=16
- Print jump table contents.
- Don't print host addresses, in general.
- and various other cleanups.
llvm-svn: 85682
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