| Commit message (Collapse) | Author | Age | Files | Lines |
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for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)
llvm-svn: 23455
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This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.
This should be added to the dag combiner as well.
llvm-svn: 23403
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select_cc bits and then wrap it in a convenience function for use with
regular select.
llvm-svn: 23389
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llvm-svn: 23371
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into particular vregs, emit copies into the entry MBB.
llvm-svn: 23331
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when storing to an 8-bit memory location), as most don't.
llvm-svn: 23303
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llvm-svn: 23302
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select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32. Add the zero extend as needed.
llvm-svn: 23301
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llvm-svn: 23300
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as setcc and select next.
llvm-svn: 23295
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llvm-svn: 23278
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as well as fixing how we replace old values with new values.
llvm-svn: 23260
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This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
llvm-svn: 23258
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we were losing a node, causing an assertion to fail. Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.
llvm-svn: 23255
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that option for PowerPC's beta.
llvm-svn: 23253
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I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
llvm-svn: 23243
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llvm-svn: 23235
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values, and then we should be able to hook it up.
llvm-svn: 23231
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llvm-svn: 23229
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i64 values on targets that need that expanded to 32-bit registers. This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.
llvm-svn: 23228
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llvm-svn: 23224
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from the binary ops map, even if they had multiple results. This latent bug
caused a few failures with the dag isel last night.
To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!
llvm-svn: 23221
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number of elements.
llvm-svn: 23219
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llvm-svn: 23215
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llvm-svn: 23208
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instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.
llvm-svn: 23205
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llvm-svn: 23204
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llvm-svn: 23203
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over to DAGCombiner.cpp
1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
MaskedValueIsZero
llvm-svn: 23196
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left to do).
llvm-svn: 23195
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llvm-svn: 23186
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statement in visit().
llvm-svn: 23185
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be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
llvm-svn: 23184
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llvm-svn: 23173
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llvm-svn: 23169
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llvm-svn: 23166
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case in MaskedValueIsZero was wrong.
llvm-svn: 23165
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MaskedValueIsZero.
llvm-svn: 23164
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likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :(
This fixes compilation of mesa
llvm-svn: 23161
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to SHIFT_PARTS nodes
llvm-svn: 23151
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at least tends to expose problems elsewhere.
llvm-svn: 23149
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llvm-svn: 23148
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them. This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.
Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values. this allows us to codegen
int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
mulhw r3, r4, r3
blr
instead of:
_mulhs:
mulhwu r2, r4, r3
srawi r5, r3, 31
mullw r5, r4, r5
add r2, r2, r5
srawi r4, r4, 31
mullw r3, r4, r3
add r3, r2, r3
blr
with a similar improvement on x86.
llvm-svn: 23147
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llvm-svn: 23145
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llvm-svn: 23144
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token chains first. For this C function:
int test() {
int i;
for (i = 0; i < 100000; ++i)
foo();
}
Instead of emitting this (condition before call)
.LBB_test_1: ; no_exit
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr2, r30, r2
bl L_foo$stub
bne cr2, .LBB_test_1 ; no_exit
Emit this:
.LBB_test_1: ; no_exit
bl L_foo$stub
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr0, r30, r2
bne cr0, .LBB_test_1 ; no_exit
Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.
This also makes the code much more similar to what the pattern isel produces.
llvm-svn: 23135
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llvm-svn: 23131
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llvm-svn: 23130
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llvm-svn: 23129
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llvm-svn: 23122
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