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* Removed more <iostream> includesBill Wendling2006-12-071-2/+1
| | | | llvm-svn: 32321
* Removing even more <iostream> includes.Bill Wendling2006-12-079-155/+144
| | | | llvm-svn: 32320
* Detemplatize the Statistic class. The only type it is instantiated withChris Lattner2006-12-062-5/+5
| | | | | | is 'unsigned'. llvm-svn: 32279
* Unbreak VC++ build.Jeff Cohen2006-12-021-0/+1
| | | | llvm-svn: 32113
* Match TargetInstrInfo changes.Evan Cheng2006-12-012-10/+5
| | | | llvm-svn: 32098
* Avoid inifinite looping if READCYCLECOUNTER isn't custom lowered.Evan Cheng2006-11-291-3/+8
| | | | llvm-svn: 32022
* Allow target to custom lower READCYCLECOUNTER (when it doesn't have to be ↵Evan Cheng2006-11-291-2/+10
| | | | | | expanded). llvm-svn: 32016
* Fix for PR1023 by Dan Gohman.Evan Cheng2006-11-291-1/+1
| | | | llvm-svn: 32003
* Fix for PR1022 (folding loads of static initializers) by Dan Gohman.Evan Cheng2006-11-291-1/+1
| | | | llvm-svn: 32000
* add a hook to allow targets to hack on inline asms to lower them to llvmChris Lattner2006-11-291-1/+13
| | | | | | when they want to. llvm-svn: 31997
* Fix PR1016Chris Lattner2006-11-281-5/+4
| | | | llvm-svn: 31950
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-272-3/+4
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Fix the dag combiner bug corresponding to PR1014.Chris Lattner2006-11-271-8/+8
| | | | llvm-svn: 31943
* For better or worse, load from i1 is assumed to be zero extended. Do notChris Lattner2006-11-271-1/+6
| | | | | | form a load from i1 from larger loads that may not be zext'd. llvm-svn: 31933
* If a brcond condition is promoted, make sure to zero extend it, even if notChris Lattner2006-11-271-6/+6
| | | | | | expanded into BR_CC. llvm-svn: 31932
* For PR950:Reid Spencer2006-11-271-56/+140
| | | | | | | | | | The long awaited CAST patch. This introduces 12 new instructions into LLVM to replace the cast instruction. Corresponding changes throughout LLVM are provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the exception of 175.vpr which fails only on a slight floating point output difference. llvm-svn: 31931
* Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.llChris Lattner2006-11-201-2/+2
| | | | llvm-svn: 31878
* For PR950:Reid Spencer2006-11-201-0/+56
| | | | | | | | First in a series of patches to convert SetCondInst into ICmpInst and FCmpInst using only two opcodes and having the instructions contain their predicate value. Nothing uses these classes yet. More patches to follow. llvm-svn: 31867
* Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build.Jim Laskey2006-11-171-0/+1
| | | | llvm-svn: 31822
* Fix an incorrectly inverted condition.Evan Cheng2006-11-162-2/+1
| | | | llvm-svn: 31773
* remove dead #includeChris Lattner2006-11-151-1/+0
| | | | llvm-svn: 31753
* Matches MachineInstr changes.Evan Cheng2006-11-131-4/+1
| | | | llvm-svn: 31712
* Make an assert comment match the tested assertion.Reid Spencer2006-11-111-1/+1
| | | | llvm-svn: 31686
* Add methods to add implicit def use operands to a MI.Evan Cheng2006-11-111-10/+1
| | | | llvm-svn: 31675
* disallow preinc of a frameindex. This is not profitable and causes 2-addrChris Lattner2006-11-111-5/+11
| | | | | | pass to explode. This fixes a bunch of llc-beta failures on ppc last night. llvm-svn: 31661
* reduce indentation by using early exits. No functionality change.Chris Lattner2006-11-111-154/+161
| | | | llvm-svn: 31660
* move big chunks of code out-of-line, no functionality change.Chris Lattner2006-11-111-235/+241
| | | | llvm-svn: 31658
* Fix a dag combiner bug exposed by my recent instcombine patch. This fixesChris Lattner2006-11-101-1/+1
| | | | | | CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast llvm-svn: 31644
* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-101-0/+12
| | | | llvm-svn: 31633
* When forming a pre-indexed store, make sure ptr isn't the same or is a pred ↵Evan Cheng2006-11-101-7/+16
| | | | | | of value being stored. It would cause a cycle. llvm-svn: 31631
* commentateChris Lattner2006-11-101-0/+2
| | | | llvm-svn: 31627
* Don't attempt expensive pre-/post- indexed dag combine if target does not ↵Evan Cheng2006-11-091-1/+18
| | | | | | support them. llvm-svn: 31598
* Add a mechanism to specify whether a target supports a particular indexed ↵Evan Cheng2006-11-091-0/+8
| | | | | | load / store. llvm-svn: 31597
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-091-2/+2
| | | | llvm-svn: 31596
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-092-9/+11
| | | | llvm-svn: 31595
* getPostIndexedAddressParts change: passes in load/store instead of its ↵Evan Cheng2006-11-091-3/+1
| | | | | | loaded / stored VT. llvm-svn: 31584
* Match more post-indexed ops.Evan Cheng2006-11-081-2/+6
| | | | llvm-svn: 31569
* Remove redundant <cmath>.Jim Laskey2006-11-082-2/+0
| | | | llvm-svn: 31561
* - When performing pre-/post- indexed load/store transformation, do not worryEvan Cheng2006-11-081-90/+29
| | | | | | | | about whether the new base ptr would be live below the load/store. Let two address pass split it back to non-indexed ops. - Minor tweaks / fixes. llvm-svn: 31544
* Fixed a minor bug preventing some pre-indexed load / store transformation.Evan Cheng2006-11-081-3/+3
| | | | llvm-svn: 31543
* For PR950:Reid Spencer2006-11-081-4/+2
| | | | | | | | This patch converts the old SHR instruction into two instructions, AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not dependent on the sign of their operands. llvm-svn: 31542
* Fix a obscure post-indexed load / store dag combine bug.Evan Cheng2006-11-081-1/+1
| | | | llvm-svn: 31537
* Add post-indexed load / store transformations.Evan Cheng2006-11-071-49/+198
| | | | llvm-svn: 31498
* Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll.Chris Lattner2006-11-071-1/+1
| | | | | | The low part goes in the first operand of expandop, not the second one. llvm-svn: 31487
* Remove dead code; added a missing null ptr check.Evan Cheng2006-11-061-32/+1
| | | | llvm-svn: 31478
* Add comment.Evan Cheng2006-11-061-4/+10
| | | | llvm-svn: 31473
* Unbreak VC++ build.Jeff Cohen2006-11-052-9/+9
| | | | llvm-svn: 31464
* Added pre-indexed store support.Evan Cheng2006-11-051-10/+24
| | | | llvm-svn: 31459
* Added getIndexedStore.Evan Cheng2006-11-051-0/+30
| | | | llvm-svn: 31458
* Changes to use operand constraints to process two-address instructions.Evan Cheng2006-11-043-50/+140
| | | | llvm-svn: 31453
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