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* This is the patch to provide clean intrinsic function overloading support in ↵Chandler Carruth2007-08-041-12/+0
| | | | | | | | LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported. llvm-svn: 40807
* don't redefine a parameterChris Lattner2007-08-021-1/+1
| | | | llvm-svn: 40748
* Do not emit copies for physical register output if it's not used.Evan Cheng2007-08-022-2/+28
| | | | llvm-svn: 40722
* Style police: Expand the tabs to spaces!Scott Michel2007-08-021-5/+5
| | | | llvm-svn: 40712
* Instead of adding copyfromreg's to handle physical definitions. Now isel canEvan Cheng2007-08-021-68/+78
| | | | | | | | | | | | | | simply specify them as results and let scheduledag handle them. That is, instead of SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...) SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag) Just write: SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...) And let scheduledag emit the move from X86::EAX to a virtual register. llvm-svn: 40710
* Expand unaligned loads/stores when the target doesn't support them. (PR1548)Lauro Ramos Venancio2007-08-011-3/+140
| | | | llvm-svn: 40682
* - Allow custom lowering for CTPOP, CTTZ, CTLZ.Scott Michel2007-07-301-2/+9
| | | | | | - Fixed an existing unexpanded tab. llvm-svn: 40605
* Fix a bug in getCopyFromParts turned up in the testcase for PR1132.Dan Gohman2007-07-301-3/+3
| | | | llvm-svn: 40598
* Support for trampolines, except for X86 codegen which isDuncan Sands2007-07-273-0/+56
| | | | | | still under discussion. llvm-svn: 40549
* Fix the alias analysis query in DAGCombiner to not add in twoDan Gohman2007-07-261-2/+2
| | | | | | | offsets. The SrcValueOffset values are the real offsets from the SrcValue base pointers. llvm-svn: 40534
* Teach DAG scheduling how to properly emit subreg insert/extract machine ↵Christopher Lamb2007-07-261-0/+150
| | | | | | instructions. PR1350 llvm-svn: 40520
* Add selection DAG nodes for subreg insert/extract. PR1350Christopher Lamb2007-07-262-2/+21
| | | | llvm-svn: 40516
* Fix infinite recursion for when extract_vector_elt is legal. Unfortunately ↵Christopher Lamb2007-07-261-1/+1
| | | | | | no public targets use this code-path, so no test. llvm-svn: 40510
* Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask.Dan Gohman2007-07-241-2/+2
| | | | llvm-svn: 40480
* Fix some uses of dyn_cast to be uses of cast.Dan Gohman2007-07-231-1/+1
| | | | llvm-svn: 40443
* As pointed out by g++-4.2, the original code didn't doDuncan Sands2007-07-191-2/+2
| | | | | | what it thought it was doing. llvm-svn: 40044
* It's not necessary to do rounding for alloca operations when the requestedDan Gohman2007-07-181-5/+5
| | | | | | alignment is equal to the stack alignment. llvm-svn: 40004
* Fix comments about vectors to use the current wording.Dan Gohman2007-07-162-4/+4
| | | | llvm-svn: 39921
* Fix the build. Patch from Holger Schurig.Nick Lewycky2007-07-141-1/+2
| | | | llvm-svn: 39856
* Long live the exception handling!Anton Korobeynikov2007-07-143-0/+65
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* Fix the comment for LegalizeOp to more accurately reflect what it does.Dan Gohman2007-07-131-3/+4
| | | | llvm-svn: 39827
* Don't call SimplifyVBinOp for non-vector operations, following earlier reviewDan Gohman2007-07-131-25/+49
| | | | | | feedback. This theoretically makes the common (scalar) case more efficient. llvm-svn: 39823
* Skeleton of post-RA scheduler; doesn't do anything yet.Dale Johannesen2007-07-135-6/+6
| | | | | | | Change name of -sched option and DEBUG_TYPE to pre-RA-sched; adjust testcases. llvm-svn: 39816
* Change the peep for EXTRACT_VECTOR_ELT of BUILD_PAIR to look forDan Gohman2007-07-101-7/+19
| | | | | | | the new CONCAT_VECTORS node type instead, as that's what legalize uses now. And add a peep for EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT. llvm-svn: 38503
* If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def.Evan Cheng2007-07-101-1/+4
| | | | llvm-svn: 38496
* Fix a bug in the folding of binary operators to undef.Dan Gohman2007-07-101-4/+10
| | | | | | Thanks to Lauro for spotting this! llvm-svn: 38491
* Fix the folding of undef in several binary operators to recognizeDan Gohman2007-07-101-7/+7
| | | | | | undef in either the left or right operand. llvm-svn: 38489
* When a node value is only used by a CopyToReg, use the user's dest. This ↵Evan Cheng2007-07-102-51/+56
| | | | | | should not be restricted to nodes that produce only a single value. llvm-svn: 38485
* Move DenseMapKeyInfo<SDOperand> from LegalizeDAG.cpp to SelectionDAGNodes.hEvan Cheng2007-07-101-12/+0
| | | | llvm-svn: 38484
* Preserve volatililty and alignment information when lowering orDan Gohman2007-07-092-36/+62
| | | | | | simplifying loads and stores. llvm-svn: 38473
* Change getCopyToParts and getCopyFromParts to always use target-endianDan Gohman2007-07-091-30/+18
| | | | | | | | register ordering, for both physical and virtual registers. Update the PPC target lowering for calls to expect registers for the call result to already be in target order. llvm-svn: 38471
* Initialize the IndexedModeActions array with memset beforeDan Gohman2007-07-091-1/+3
| | | | | | | | | | | updating it with calls to setIndexedLoadAction/setIndexedStoreAction, which only update a few bits at a time. This avoids ostensible undefined behavior of operationg on values which may be trap-representations, and as a practical matter fixes errors from valgrind, which doesn't track uninitialized memory with bit granularity. llvm-svn: 38468
* Fix this warning:Chris Lattner2007-07-091-1/+1
| | | | | | | | | DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)': DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)' oiy. llvm-svn: 38458
* The exception handling intrinsics return values,Duncan Sands2007-07-061-1/+2
| | | | | | | | | | | | | so must be lowered to a value, not nothing at all. Subtle point: I made eh_selector return 0 and eh_typeid_for return 1. This means that only cleanups (destructors) will be run as the exception unwinds [if eh_typeid_for returned 0 then it would be as if the first catch always matched, and the corresponding handler would be run], which is probably want you want in the CBE. llvm-svn: 37947
* Add the byval attributeRafael Espindola2007-07-061-0/+2
| | | | llvm-svn: 37940
* Remove propagateEHRegister in favour of a more limitedDuncan Sands2007-07-061-24/+8
| | | | | | fix, that is adequate while PR1508 remains unresolved. llvm-svn: 37938
* Remove ExtractGlobalVariable - use StripPointerCastsDuncan Sands2007-07-061-20/+3
| | | | | | instead. llvm-svn: 37937
* Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines.Evan Cheng2007-07-061-4/+8
| | | | llvm-svn: 37935
* Change CalculateHeights and CalculateDepths to be non-recursive.Evan Cheng2007-07-061-22/+28
| | | | llvm-svn: 37934
* Make the debug string for ISD::MERGE_VALUES consistent with the others.Dan Gohman2007-07-051-1/+1
| | | | llvm-svn: 37922
* Add a parameter to getCopyToParts and getCopyFromParts to specify whetherDan Gohman2007-07-051-197/+211
| | | | | | | | endian swapping should be done, and update the code to use it. This fixes some register ordering issues on big-endian systems, such as PowerPC, introduced by the recent illegal by-val arguments changes. llvm-svn: 37921
* Extend eh.selector to support both catches and filters.Duncan Sands2007-07-041-34/+58
| | | | | | Drop the eh.filter intrinsic. llvm-svn: 37875
* Fix several over-aggressive folds for undef nodes in dagcombine, toDan Gohman2007-07-031-51/+46
| | | | | | follow the rules for undef used in instcombine. llvm-svn: 37851
* Fix for PR 1505 (and 1489). Rewrite X87 registerDale Johannesen2007-07-032-10/+24
| | | | | | | model to include f32 variants. Some factoring improvments forthcoming. llvm-svn: 37847
* Replace ExpandScalarFormalArgs and ExpandScalarCallArgs with the newlyDan Gohman2007-07-021-124/+30
| | | | | | | | refactored getCopyFromParts and getCopyToParts, which are more general. This effectively adds support for lowering illegal by-val vector call arguments. llvm-svn: 37843
* Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, andDan Gohman2007-07-021-11/+14
| | | | | | | | | | visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG to use isNegatibleForFree/GetNegatedExpression instead of doing a subset of the same thing manually. This fixes test/CodeGen/X86/negative-sin.ll. llvm-svn: 37842
* Only do FNEG xform when the vector type is a floating point type.Evan Cheng2007-06-291-7/+9
| | | | llvm-svn: 37818
* Remove unused variables.David Greene2007-06-291-3/+0
| | | | llvm-svn: 37816
* Fix a vector FP constant CSE bug.Evan Cheng2007-06-291-5/+10
| | | | llvm-svn: 37814
* Remove unnecessary attributions in comments.David Greene2007-06-292-3/+3
| | | | llvm-svn: 37799
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