| Commit message (Collapse) | Author | Age | Files | Lines |
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instead of the one that doesn't and then adding it manually.
llvm-svn: 55006
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a desired opcode.
llvm-svn: 55005
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llvm-svn: 54978
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In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:
Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)
Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.
llvm-svn: 54899
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for splitting AsmPrinter into its own library.
llvm-svn: 54881
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returning an std::string by value, it fills in a SmallString/SmallVector
passed in. This significantly reduces string thrashing in some cases.
More specifically, this:
- Adds an operator<< and a print method for APInt that allows you to
directly send them to an ostream.
- Reimplements APInt::toString to be much simpler and more efficient
algorithmically in addition to not thrashing strings quite as much.
This speeds up llvm-dis on kc++ by 7%, and may also slightly speed up the
asmprinter. This also fixes a bug I introduced into the asmwriter in a
previous patch w.r.t. alias printing.
llvm-svn: 54873
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llvm-svn: 54793
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llvm-svn: 54784
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can have a non-negative result; for example, -16%16 is 0. Also,
clarify the related comments. This fixes PR2670.
llvm-svn: 54767
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non-constant indices. Only a few of the peephole checks require
a constant index.
llvm-svn: 54764
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the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
llvm-svn: 54751
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room for the new FastISel instruction selection code.
llvm-svn: 54749
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llvm-svn: 54688
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of stack objects. This fixes PR2656.
llvm-svn: 54646
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llvm-svn: 54522
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FPROUND_F80_F32, FPROUND_PPCF128_F32,
FPROUND_F80_F64, FPROUND_PPCF128_F64
Support for soften float fp_round operands is added, Mips
needs this to round f64->f32.
Also added support to soften float FABS result, Mips doesn't
support double fabs results while in 'single float only' mode.
llvm-svn: 54484
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SelectBasicBlock. No functionality changes.
llvm-svn: 54438
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needed.
llvm-svn: 54361
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llvm-svn: 54349
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llvm-svn: 54336
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- Add a basic machine-level dead block eliminator.
These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.
llvm-svn: 54333
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This allows it to work correctly on aggregate values.
This fixes PR2623.
llvm-svn: 54331
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This allows it to work correctly on nested aggregate values.
This fixes PR2625.
llvm-svn: 54330
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switches use the binary search algorithm) for
environments that don't support it. PPC64 JIT
is such an environment; turn the flag on for that.
llvm-svn: 54248
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llvm-svn: 54239
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it isn't always visible to gdb.
llvm-svn: 54228
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empty structs. This fixes PR2612.
llvm-svn: 54226
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llvm-svn: 54168
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The CellSPU codegen is broken, but needs to be fixed before we can
put this back in.
llvm-svn: 54164
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CodeGen & Clang work coming next.
llvm-svn: 54161
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a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.
Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.
Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.
llvm-svn: 54146
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the SelectionDAG's.
llvm-svn: 54129
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llvm-svn: 54128
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parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
llvm-svn: 54127
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llvm-svn: 54124
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unary operations! Add support for softening
some additional unary operations like fp_to_sint.
llvm-svn: 54122
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llvm-svn: 54007
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dependencies with constant load nodes. This allows them to be scheduled
freely.
llvm-svn: 54001
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Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.
The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.
llvm-svn: 53941
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llvm-svn: 53938
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output a vector value. Patch by Nicolas Capens!
llvm-svn: 53932
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and use the right result number, in the off chance that the graph root
has multiple result values.
llvm-svn: 53923
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llvm-svn: 53884
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SelectionDAG graph writer to make use of them. Now, nodes with multiple
values are displayed as such, with incoming edges pointing to the
specific value they use.
llvm-svn: 53875
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llvm-svn: 53874
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that include useful information like the name of the
block being viewed and the current phase of compilation.
llvm-svn: 53872
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generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
llvm-svn: 53850
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Richard Pennington.
llvm-svn: 53773
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llvm-svn: 53772
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the night realising that it was wrong :) I
think the reason the same type was being used
for the shufflevec of indices as for the actual
indices is so that if one of them needs splitting
then so does the other. After my patch it might
be that the indices need splitting but not the
rest, yet there is no good way of handling that.
I think the right solution is to not have the
shufflevec be an operand at all: just have it
be the list of numbers it actually is, stored
as extra info in the node.
llvm-svn: 53768
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