summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
Commit message (Collapse)AuthorAgeFilesLines
* Avoid a Symbol -> Name -> Symbol conversion.Rafael Espindola2015-06-226-6/+24
| | | | | | | | | | | | | | Before this we were producing a TargetExternalSymbol from a MCSymbol. That meant extracting the symbol name and fetching the symbol again down the pipeline. This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the DAG. Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900, allowing r240130 to be committed again. llvm-svn: 240300
* Fix shl folding in DAG combiner.Pawel Bylica2015-06-221-1/+1
| | | | | | | | | | | | | | | | Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared. Test Plan: A regression test included. Reviewers: andreadb Reviewed By: andreadb Subscribers: andreadb, test, llvm-commits Differential Revision: http://reviews.llvm.org/D10602 llvm-svn: 240291
* [PM/AA] Hoist the AliasResult enum out of the AliasAnalysis class.Chandler Carruth2015-06-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow classes to implement the AA interface without deriving from the class or referencing an internal enum of some other class as their return types. Also, to a pretty fundamental extent, concepts such as 'NoAlias', 'MayAlias', and 'MustAlias' are first class concepts in LLVM and we aren't saving anything by scoping them heavily. My mild preference would have been to use a scoped enum, but that feature is essentially completely broken AFAICT. I'm extremely disappointed. For example, we cannot through any reasonable[1] means construct an enum class (or analog) which has scoped names but converts to a boolean in order to test for the possibility of aliasing. [1]: Richard Smith came up with a "solution", but it requires class templates, and lots of boilerplate setting up the enumeration multiple times. Something like Boost.PP could potentially bundle this up, but even that would be quite painful and it doesn't seem realistically worth it. The enum class solution would probably work without the need for a bool conversion. Differential Revision: http://reviews.llvm.org/D10495 llvm-svn: 240255
* Switch lowering: add heuristic for filling leaf nodes in the weight-balanced ↵Hans Wennborg2015-06-202-0/+59
| | | | | | | | | | | | | | | | | | binary search tree Sparse switches with profile info are lowered as weight-balanced BSTs. For example, if the node weights are {1,1,1,1,1,1000}, the right-most node would end up in a tree by itself, bringing it closer to the top. However, a leaf in this BST can contain up to 3 cases, and having a single case in a leaf node as in the example means the tree might become unnecessarily high. This patch adds a heauristic to the pivot selection algorithm that moves more cases into leaf nodes unless that would lower their rank. It still doesn't yield the optimal tree in every case, but I believe it's conservatibely correct. llvm-svn: 240224
* [Statepoint] Remove unnecessary argument from Statepoint::getRelocatesSanjoy Das2015-06-201-4/+2
| | | | | | NFC. llvm-svn: 240198
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-1910-15/+15
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* Switch lowering: enable whole-switch jump tables at -O0.Hans Wennborg2015-06-181-15/+31
| | | | | | | | To same compile time, the analysis to find dense case-clusters in switches is not done at -O0. However, when the whole switch is dense enough, it is easy to turn it into a jump table, resulting in much faster code with no extra effort. llvm-svn: 240071
* fix typo; NFCSanjay Patel2015-06-181-4/+4
| | | | llvm-svn: 240022
* remove unnecessary casts; NFCSanjay Patel2015-06-171-4/+2
| | | | llvm-svn: 239942
* Move the personality function from LandingPadInst to FunctionDavid Majnemer2015-06-172-6/+10
| | | | | | | | | | | | | | | | | | | The personality routine currently lives in the LandingPadInst. This isn't desirable because: - All LandingPadInsts in the same function must have the same personality routine. This means that each LandingPadInst beyond the first has an operand which produces no additional information. - There is ongoing work to introduce EH IR constructs other than LandingPadInst. Moving the personality routine off of any one particular Instruction and onto the parent function seems a lot better than have N different places a personality function can sneak onto an exceptional function. Differential Revision: http://reviews.llvm.org/D10429 llvm-svn: 239940
* fix typos in comments; NFCSanjay Patel2015-06-171-2/+2
| | | | llvm-svn: 239916
* [PM/AA] Remove the Location typedef from the AliasAnalysis class nowChandler Carruth2015-06-172-15/+10
| | | | | | | | | | | | that it is its own entity in the form of MemoryLocation, and update all the callers. This is an entirely mechanical change. References to "Location" within AA subclases become "MemoryLocation", and elsewhere "AliasAnalysis::Location" becomes "MemoryLocation". Hope that helps out-of-tree folks update. llvm-svn: 239885
* rename variables; NFCSanjay Patel2015-06-161-13/+13
| | | | | | ...because I see 'StoreBW' and read it as 'store bandwidth' llvm-svn: 239850
* extract some code into a helper function for MergeConsecutiveStores(); NFCISanjay Patel2015-06-161-43/+57
| | | | llvm-svn: 239847
* propagate IR-level fast-math-flags to DAG nodes, disabled by defaultSanjay Patel2015-06-164-51/+63
| | | | | | | | | | | | | | | | | | | | | | | This is an updated version of the patch that was checked in at: http://reviews.llvm.org/rL237046 but subsequently reverted because it exposed a bug in the DAG Combiner: http://reviews.llvm.org/D9893 This time, there's an enablement flag ("EnableFMFInDAG") around the code in SelectionDAGBuilder where we copy the set of FP optimization flags from IR instructions to DAG nodes. So, in theory, there should be no functional change from this patch as-is, but it will allow testing with the added functionality to proceed via "-enable-fmf-dag" passed to llc. This patch adds the minimum plumbing necessary to use IR-level fast-math-flags (FMF) in the backend without actually using them for anything yet. This is a follow-on to: http://reviews.llvm.org/rL235997 Differential Revision: http://reviews.llvm.org/D10403 llvm-svn: 239828
* Revert "Revert "Fix merges of non-zero vector stores""Matt Arsenault2015-06-161-6/+20
| | | | | | | | Reapply r239539. Don't assume the collected number of stores is the same vector size. Just take the first N stores to fill the vector. llvm-svn: 239825
* [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.Simon Pilgrim2015-06-131-0/+3
| | | | llvm-svn: 239682
* [SelectionDAG] Added assertions + UNDEF handling for BSWAP node creation.Simon Pilgrim2015-06-131-0/+8
| | | | llvm-svn: 239679
* [DAGCombiner] Added BSWAP vector constant folding support.Simon Pilgrim2015-06-132-0/+13
| | | | llvm-svn: 239675
* Stripped trailing whitespace. NFC.Simon Pilgrim2015-06-131-5/+5
| | | | llvm-svn: 239674
* Revert "Fix merges of non-zero vector stores"Reid Kleckner2015-06-111-19/+6
| | | | | | | | This reverts commit r239539. It was causing SDAG assertions while building freetype. llvm-svn: 239543
* Fix merges of non-zero vector storesMatt Arsenault2015-06-111-6/+19
| | | | | | | | | | Now actually stores the non-zero constant instead of 0. I somehow forgot to include this part of r238108. The test change was just an independent instruction order swap, so just add another check line to satisfy CHECK-NEXT. llvm-svn: 239539
* [StatepointLowering] Reuse stack slots across basic blocksIgor Laevsky2015-06-101-66/+115
| | | | | | | | | | | During statepoint lowering we can sometimes avoid spilling of the value if we know that it was already spilled for previous statepoint. We were doing this by checking if incoming statepoint value was lowered into load from stack slot. This was working only in boundaries of one basic block. But instead of looking at the lowered node we can look directly at the llvm-ir value and if it was gc.relocate (or some simple modification of it) look up stack slot for it's derived pointer and reuse stack slot from it. This allows us to look across basic block boundaries. Differential Revision: http://reviews.llvm.org/D10251 llvm-svn: 239472
* [WinEH] Add 32-bit SEH state table emission prototypeReid Kleckner2015-06-092-5/+13
| | | | | | | | | | | | This gets all the handler info through to the asm printer and we can look at the .xdata tables now. I've convinced one small catch-all test case to work, but other than that, it would be a stretch to say this is functional. The state numbering algorithm avoids doing any scope reconstruction as we do for C++ to simplify the implementation. llvm-svn: 239433
* Implement computeKnownBits for min/max nodesMatt Arsenault2015-06-091-1/+22
| | | | llvm-svn: 239378
* [DAGCombiner] Added CTLZ vector constant folding support.Simon Pilgrim2015-06-082-2/+4
| | | | llvm-svn: 239305
* [DAGCombiner] Added CTTZ vector constant folding support.Simon Pilgrim2015-06-082-2/+4
| | | | llvm-svn: 239293
* [DAGCombiner] Added CTPOP vector constant folding support.Simon Pilgrim2015-06-072-2/+3
| | | | | | Added tests to the existing SSE/AVX test files. llvm-svn: 239252
* DAGCombiner: don't duplicate (fmul x, c) in visitFNEG if fneg is freeFiona Glaser2015-06-051-1/+2
| | | | | | | | | | For targets with a free fneg, this fold is always a net loss if it ends up duplicating the multiply, so definitely avoid it. This might be true for some targets without a free fneg too, but I'll leave that for future investigation. llvm-svn: 239167
* Simplify code; NFC.Andrea Di Biagio2015-06-051-7/+7
| | | | | | | | Also, moved test cases from CodeGen/X86/fold-buildvector-bug.ll into CodeGen/X86/buildvec-insertvec.ll and regenerated CHECK lines using update_llc_test_checks.py. llvm-svn: 239142
* Statepoint: Fix handling of Far Immediate callsSwaroop Sridhar2015-06-041-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | gc.statepoint intrinsics with a far immediate call target were lowered incorrectly as pc-rel32 calls. This change fixes the problem, and generates an indirect call via a scratch register. For example: Intrinsic: %safepoint_token = call i32 (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* inttoptr (i64 140727162896504 to void ()*), i32 0, i32 0, i32 0, i32 0) Old Incorrect Lowering: callq 140727162896504 New Correct Lowering: movabsq $140727162896504, %rax callq *%rax In lowerCallFromStatepoint(), the callee-target was modified and represented as a "TargetConstant" node, rather than a "Constant" node. Undoing this modification enabled LowerCall() to generate the correct CALL instruction. llvm-svn: 239114
* [SDAG switch lowering] Fix switch case -> or merging for 0 and INT_MINBenjamin Kramer2015-06-041-9/+5
| | | | | | | | | | | The big/small ordering here is based on signed values so SmallValue will be INT_MIN and BigValue 0. This shouldn't be a problem but the code assumed that BigValue always had more bits set than SmallValue. We used to just miss the transformation, but a recent refactoring of mine turned this into an assertion failure. llvm-svn: 239105
* Erase constant dbgloc on reuse in PHI nodeSergey Dmitrouk2015-06-041-1/+10
| | | | | | | | | | | | | | | | | | | | Basic block selection involves checking successor BBs for PHI nodes that depend on the current BB. In case such BBs are found, the value being selected is a constant and such constant already exists in current BB, it's value is reused. This might lead to wrong locations in some situations, especially if same constant value ends up being materialized twice in two different ways, which discards that sharing and leaves us with wrong debug location in the successor BB. In code this involves the following sequence of calls: SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks -> SelectionDAGBuilder::CopyValueToVirtualRegister -> SelectionDAGBuilder::getNonRegisterValue llvm-svn: 239089
* [DAGCombiner] Fix wrong folding of a build_vector into a blend with zero.Andrea Di Biagio2015-06-041-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Method 'visitBUILD_VECTOR' in the DAGCombiner knows how to combine a build_vector of a bunch of extract_vector_elt nodes and constant zero nodes into a shuffle blend with a zero vector. However, method 'visitBUILD_VECTOR' forgot that a floating point build_vector may contain negative zero as well as positive zero. Example: define <2 x double> @example(<2 x double> %A) { entry: %0 = extractelement <2 x double> %A, i32 0 %1 = insertelement <2 x double> undef, double %0, i32 0 %2 = insertelement <2 x double> %1, double -0.0, i32 1 ret <2 x double> %2 } Before this patch, llc (with -mattr=+sse4.1) wrongly generated movq %xmm0, %xmm0 # xmm0 = xmm0[0],zero So, the sign bit of the negative zero was effectively lost. This patch fixes the problem by adding explicit checks for positive zero. With this patch, llc produces the following code for the example above: movhpd .LCPI0_0(%rip), %xmm0 where .LCPI0_0 referes to a 'double -0'. llvm-svn: 239070
* [SDag switch lowering] Simplify code a bit. No functional change intended.Benjamin Kramer2015-06-041-10/+9
| | | | llvm-svn: 239056
* Pass address space to isLegalAddressingMode in DAGCombinerMatt Arsenault2015-06-041-1/+5
| | | | | | | No test because I don't know of a target that makes use of address spaces and indexed load / store. llvm-svn: 239051
* Switch lowering: fix assert in buildBitTests (PR23738)Hans Wennborg2015-06-041-1/+2
| | | | | | | | When checking (High - Low + 1).sle(BitWidth), BitWidth would be truncated to the size of the left-hand side. In the case of this PR, the left-hand side was i4, so BitWidth=64 got truncated to 0 and the assert failed. llvm-svn: 239048
* Don't create a MIN/MAX node if the underlying compare has more than one use.James Molloy2015-06-041-1/+5
| | | | | | | | | If the compare in a select pattern has another use then it can't be removed, so we'd just be creating repeated code if we created a min/max node. Spotted by Matt Arsenault! llvm-svn: 239037
* [SelectionDAG] Fix PR23603.Sanjoy Das2015-06-021-1/+11
| | | | | | | | | | | | | | | | | | | | | Summary: LLVM's MI level notion of invariant_load is different from LLVM's IR level notion of invariant_load with respect to dereferenceability. The IR notion of invariant_load only guarantees that all *non-faulting* invariant loads result in the same value. The MI notion of invariant load guarantees that the load can be legally moved to any location within its containing function. The MI notion of invariant_load is stronger than the IR notion of invariant_load -- an MI invariant_load is an IR invariant_load + a guarantee that the location being loaded from is dereferenceable throughout the function's lifetime. Reviewers: hfinkel, reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10075 llvm-svn: 238881
* [sdag] Add the helper I most want to the DAG -- building a bitcastChandler Carruth2015-05-301-0/+7
| | | | | | | | around a value using its existing SDLoc. Start using this in just one function to save omg lines of code. llvm-svn: 238638
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-301-1/+1
| | | | llvm-svn: 238634
* SelectionDAG: fix logic for promoting shift typesFiona Glaser2015-05-291-15/+21
| | | | | | | | | | | r238503 fixed the problem of too-small shift types by promoting them during legalization, but the correct solution is to promote only the operands that actually demand promotion. This fixes a crash on an out-of-tree target caused by trying to promote an operand that can't be promoted. llvm-svn: 238632
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-292-5/+5
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* [WinEH] Start inserting state number stores for C++ EHReid Kleckner2015-05-281-371/+3
| | | | | | | | | | | | This moves all the state numbering code for C++ EH to WinEHPrepare so that we can call it from the X86 state numbering IR pass that runs before isel. Now we just call the same state numbering machinery and insert a bunch of stores. It also populates MachineModuleInfo with information about the current function. llvm-svn: 238514
* [SelectionDAG] Scalar shift amounts may require legalizationDavid Majnemer2015-05-281-3/+6
| | | | | | | | | The shift amount may be too small to cope with promoted left hand side, make sure to promote it as well. This fixes PR23664. llvm-svn: 238503
* SelectionDAG: Don't do libcall on div/rem if divrem is customJan Vesely2015-05-271-4/+28
| | | | | | | | | | | | v2: TargetLoweringBase:: -> TargetLowering:: Use Ops array v3: Explicitly use value 0 for ?DIV Remove redundant newline Differential revision: http://reviews.llvm.org/D7803 reviewer: ab llvm-svn: 238336
* Added promotion to EXTRACT_SUBVECTOR operand.Elena Demikhovsky2015-05-252-0/+12
| | | | | | | I encountered with this case in one of KNL tests for i1 vectors. v16i1 = EXTRACT_SUBVECTOR v32i1, x llvm-svn: 238130
* Add target hook to allow merging stores of nonzero constantsMatt Arsenault2015-05-241-3/+10
| | | | | | | | | | On GPU targets, materializing constants is cheap and stores are expensive, so only doing this for zero vectors was silly. Most of the new testcases aren't optimally merged, and are for later improvements. llvm-svn: 238108
* SDAG: Give SDDbgValues their own allocator (and reset it)Duncan P. N. Exon Smith2015-05-221-3/+4
| | | | | | | | | | | | Previously `SDDbgValue`s used the general allocator that lives for all of `SelectionDAG`. Instead, give them their own allocator, and reset it whenever `SDDbgInfo::clear()` is called, plugging a spiritual leak. This drops `SelectionDAGBuilder::visitIntrinsicCall()` off of my heap profile (was at around 2% of `llc` for codegen of `-flto -g`). Thanks to Pete Cooper for spotting the problem and suggesting the fix. llvm-svn: 237998
* SDAG: Cleanup initialization of SDDbgValue, NFCDuncan P. N. Exon Smith2015-05-221-9/+7
| | | | | | | | Cleanup how `SDDbgValue` is initialized, and rearrange the fields to save two pointers in the struct layout. No real functionality change though (and I doubt the memory savings would show up in a profile). llvm-svn: 237997
OpenPOWER on IntegriCloud