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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Remove BRTWOWAY*Nate Begeman2006-03-171-4/+4
| | | | | | | | Make the PPC backend not dependent on BRTWOWAY_CC and make the branch selector smarter about the code it generates, fixing a case in the readme. llvm-svn: 26814
* Fix a problem fully scalarizing values.Chris Lattner2006-03-161-1/+4
| | | | llvm-svn: 26811
* Add support for CopyFromReg from vector values. Note: this doesn't supportChris Lattner2006-03-161-104/+119
| | | | | | illegal vector types yet! llvm-svn: 26799
* Teach CreateRegForValue how to handle vector types.Chris Lattner2006-03-161-23/+53
| | | | llvm-svn: 26798
* add support for vector->vector castsChris Lattner2006-03-151-33/+77
| | | | llvm-svn: 26788
* Handle the removal of the debug chain.Jim Laskey2006-03-131-4/+4
| | | | llvm-svn: 26729
* Added a parameter to control whether Constant::getStringValue() would chopEvan Cheng2006-03-101-1/+1
| | | | | | off the result string at the first null terminator. llvm-svn: 26704
* scrape out bits of llvm-dbChris Lattner2006-03-101-9/+0
| | | | llvm-svn: 26701
* Simplify the interface to the schedulers, to not pass the selected heuristicin.Chris Lattner2006-03-101-1/+15
| | | | llvm-svn: 26692
* remove dbg_declare, it's not used yet.Chris Lattner2006-03-091-4/+0
| | | | llvm-svn: 26659
* Get rid of the multiple copies of getStringValue. Now a Constant:: method.Jim Laskey2006-03-081-19/+1
| | | | llvm-svn: 26616
* Change the interface for getting a target HazardRecognizer to be more clean.Chris Lattner2006-03-081-5/+3
| | | | llvm-svn: 26608
* Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to whereChris Lattner2006-03-061-4/+10
| | | | | | | | targets can implement them. Make the top-down scheduler non-g5-specific. Remove the old testing hazard recognizer. llvm-svn: 26569
* Split the list scheduler into top-down and bottom-up pieces. The priorityChris Lattner2006-03-051-0/+6
| | | | | | | | function of the top-down scheduler are completely bogus currently, and having (future) PPC specific in this file is also wrong, but this is a small incremental step. llvm-svn: 26552
* Codegen copysign[f] into a FCOPYSIGN nodeChris Lattner2006-03-051-1/+12
| | | | llvm-svn: 26542
* Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR.Evan Cheng2006-03-031-4/+6
| | | | llvm-svn: 26504
* remove the read/write port/io intrinsics.Chris Lattner2006-03-031-23/+0
| | | | llvm-svn: 26479
* Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolvingChris Lattner2006-03-031-3/+12
| | | | | | PR709, and paving the way for future progress. llvm-svn: 26476
* Vector ops lowering.Evan Cheng2006-03-011-4/+10
| | | | llvm-svn: 26436
* Add support for output memory constraints.Chris Lattner2006-02-271-7/+38
| | | | llvm-svn: 26410
* Get VC++ building again.Jeff Cohen2006-02-241-0/+1
| | | | llvm-svn: 26351
* Implement (most of) selection of inline asm memory operands.Chris Lattner2006-02-241-0/+42
| | | | llvm-svn: 26350
* Lower C_Memory operands.Chris Lattner2006-02-241-25/+44
| | | | llvm-svn: 26346
* Fix an endianness problem on big-endian targets with expanded operandsChris Lattner2006-02-231-9/+16
| | | | | | to inline asms. Mark some methods const. llvm-svn: 26334
* Record all of the expanded registers in the DAG and machine instr, fixingChris Lattner2006-02-231-63/+105
| | | | | | several bugs in inline asm expanded operands. llvm-svn: 26332
* This fixes a couple of problems with expansionChris Lattner2006-02-221-9/+23
| | | | llvm-svn: 26318
* Change a whole bunch of code to be built around RegsForValue instead ofChris Lattner2006-02-221-124/+248
| | | | | | | a single register number. This fully implements promotion for inline asms, expand is close but not quite right yet. llvm-svn: 26316
* split register class handling from explicit physreg handling.Chris Lattner2006-02-221-34/+77
| | | | llvm-svn: 26308
* Adjust to changes in getRegForInlineAsmConstraint prototypeChris Lattner2006-02-211-18/+18
| | | | llvm-svn: 26306
* Dumb bug. Code sees a memcpy from X+c so it increments src offset. But itEvan Cheng2006-02-161-4/+10
| | | | | | | turns out not to point to a constant string but it forgot change the offset back. llvm-svn: 26242
* If the false case is the current basic block, then this is a self loop.Evan Cheng2006-02-161-0/+9
| | | | | | | | | | We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra instruction in the loop. Instead, invert the condition and emit "Loop: ... br!cond Loop; br Out. Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering. llvm-svn: 26231
* Remove an unused function parameter.Evan Cheng2006-02-151-2/+2
| | | | llvm-svn: 26221
* Turn a memcpy from string constant into a series of stores of constant values.Evan Cheng2006-02-151-47/+69
| | | | llvm-svn: 26219
* Lower memcpy with small constant size operand into a series of load / storeEvan Cheng2006-02-151-8/+34
| | | | | | ops. llvm-svn: 26195
* Doh again!Evan Cheng2006-02-141-1/+1
| | | | llvm-svn: 26188
* Keep to < 80 colsEvan Cheng2006-02-141-6/+6
| | | | llvm-svn: 26177
* Missed a break so memcpy cases fell through to memset. Doh.Evan Cheng2006-02-141-1/+1
| | | | llvm-svn: 26176
* Fixed a build breakage.Evan Cheng2006-02-141-14/+23
| | | | llvm-svn: 26175
* Rename maxStoresPerMemSet to maxStoresPerMemset, etc.Evan Cheng2006-02-141-1/+1
| | | | llvm-svn: 26174
* Expand memset dst, c, size to a series of stores if size falls below theEvan Cheng2006-02-141-4/+127
| | | | | | target specific theshold, e.g. 16 for x86. llvm-svn: 26171
* now that libcalls don't suck, we can remove this hackChris Lattner2006-02-141-6/+2
| | | | llvm-svn: 26164
* Rename to better reflect usage (current and planned.)Jim Laskey2006-02-131-1/+1
| | | | llvm-svn: 26145
* Reorg for integration with gcc4. Old style debug info will not be passed thoughJim Laskey2006-02-111-24/+21
| | | | | | to SelIDAG. llvm-svn: 26115
* Get rid of some memory leaks identified by ValgrindEvan Cheng2006-02-041-0/+1
| | | | llvm-svn: 25960
* Add initial support for immediates. This allows us to compile this:Chris Lattner2006-02-041-1/+1
| | | | | | | | | | | | | | | | | | int %rlwnm(int %A, int %B) { %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17) ret int %C } into: _rlwnm: or r2, r3, r3 or r3, r4, r4 rlwnm r2, r2, r3, 4, 17 ;; note the immediates :) or r3, r2, r2 blr llvm-svn: 25955
* Initial early support for non-register operands, like immediatesChris Lattner2006-02-041-15/+42
| | | | llvm-svn: 25952
* remove some #ifdef'd out code, which should properly be in the dag combiner ↵Chris Lattner2006-02-031-30/+0
| | | | | | anyway. llvm-svn: 25941
* Implement matching constraints. We can now say things like this:Chris Lattner2006-02-021-15/+28
| | | | | | | | | | | | | | %C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4) and get: xyz r2, r3, r4, r2 note that the r2's are pinned together. Yaay for 2-address instructions. 2342 ---------------------------------------------------------------------- llvm-svn: 25893
* Implement simple register assignment for inline asms. This allows us to ↵Chris Lattner2006-02-011-8/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | compile: int %test(int %A, int %B) { %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B) ret int %C } into: (0x8906130, LLVM BB @0x8902220): %r2 = OR4 %r3, %r3 %r3 = OR4 %r4, %r4 INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3 %r3 = OR4 %r2, %r2 BLR which asmprints as: _test: or r2, r3, r3 or r3, r4, r4 xyz $0, $1, $2 ;; need to print the operands now :) or r3, r2, r2 blr llvm-svn: 25878
* adjust to changes in InlineAsm interface. Fix a few minor bugs.Chris Lattner2006-02-011-32/+38
| | | | llvm-svn: 25865
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