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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Delete an assignment to ThisBB which isn't needed, and tidy up someDan Gohman2011-01-141-4/+6
| | | | | | comments. llvm-svn: 123479
* Set the insertion point correctly for instructions generated by load folding:Chris Lattner2011-01-141-4/+4
| | | | | | they should go *before* the new instruction not after it. llvm-svn: 123420
* Use an IndexedMap for LiveOutRegInfo to hide its dependence on ↵Jakob Stoklund Olesen2011-01-081-3/+1
| | | | | | TargetRegisterInfo::FirstVirtualRegister. llvm-svn: 123096
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-071-5/+3
| | | | | | | | | | Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. llvm-svn: 123044
* Avoid zero extend bit test operands to pointer type if all the masks fit inEvan Cheng2011-01-061-2/+4
| | | | | | | the original type of the switch statement key. rdar://8781238 llvm-svn: 122935
* 80-cols.Eric Christopher2011-01-051-1/+2
| | | | llvm-svn: 122909
* Various bits of framework needed for precise machine-level selectionAndrew Trick2010-12-241-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | DAG scheduling during isel. Most new functionality is currently guarded by -enable-sched-cycles and -enable-sched-hazard. Added InstrItineraryData::IssueWidth field, currently derived from ARM itineraries, but could be initialized differently on other targets. Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is active, and if so how many cycles of state it holds. Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry into the scheduler's available queue. ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to get information about it's SUnits, provides RecedeCycle for bottom-up scheduling, correctly computes scoreboard depth, tracks IssueCount, and considers potential stall cycles when checking for hazards. ScheduleDAGRRList now models machine cycles and hazards (under flags). It tracks MinAvailableCycle, drives the hazard recognizer and priority queue's ready filter, manages a new PendingQueue, properly accounts for stall cycles, etc. llvm-svn: 122541
* whitespaceAndrew Trick2010-12-241-157/+157
| | | | llvm-svn: 122539
* flags -> glue for selectiondagChris Lattner2010-12-231-3/+3
| | | | llvm-svn: 122509
* sdisel flag -> glue.Chris Lattner2010-12-231-77/+76
| | | | llvm-svn: 122507
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-12/+12
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* improve "cannot yet select" errors a trivial amount: nowChris Lattner2010-12-211-1/+1
| | | | | | they are just as useless, but at least a bit more gramatical llvm-svn: 122305
* fix PR8642: if a critical edge has a PHI value that can trap,Chris Lattner2010-12-191-0/+41
| | | | | | | isel is *required* to split the edge. PHI values get evaluated on the edge, not in their predecessor block. llvm-svn: 122170
* Check for _setjmp too, because it's also used.Bill Wendling2010-11-201-0/+1
| | | | llvm-svn: 119875
* Simplify uses of MVT and EVT. An MVT can be compared directlyDuncan Sands2010-11-031-4/+3
| | | | | | | with a SimpleValueType, while an EVT supports equality and inequality comparisons with SimpleValueType. llvm-svn: 118169
* For statistics that are only used in functions declared in !NDEBUG, wrap theNick Lewycky2010-10-261-0/+3
| | | | | | | declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by Matt Beaumont-Gay! llvm-svn: 117345
* Simplify.Devang Patel2010-10-251-9/+9
| | | | | | Do not count use of sdisel for single call instruction. llvm-svn: 117316
* Add counters to count basic blocks and machine basic blocks with out of ↵Devang Patel2010-10-251-4/+63
| | | | | | | | order line number info. Add counters to count how many basic blocks are entirely selected by fastisel. llvm-svn: 117310
* Move the remaining attribute macros to systematic names based on the attributeChandler Carruth2010-10-231-12/+12
| | | | | | name and prefixed with 'LLVM_'. llvm-svn: 117203
* Get rid of static constructors for pass registration. Instead, every pass ↵Owen Anderson2010-10-191-2/+4
| | | | | | | | | | | | | | | | | exposes an initializeMyPassFunction(), which must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize the pass's dependencies. Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h before parsing commandline arguments. I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass registration/creation, please send the testcase to me directly. llvm-svn: 116820
* When isel is emitting instructions for an x86 target without CMOV, the CFG isJakob Stoklund Olesen2010-09-301-1/+7
| | | | | | | | | | | | | | | | | edited during emission. If the basic block ends in a switch that gets lowered to a jump table, any phis at the default edge were getting updated wrong. The jump table data structure keeps a pointer to the header blocks that wasn't getting updated after the MBB is split. This bug was exposed on 32-bit Linux when disabling critical edge splitting in codegen prepare. The fix is to uipdate stale MBB pointers whenever a block is split during emission. llvm-svn: 115191
* Fix VS 2010 build.Oscar Fuentes2010-09-231-4/+4
| | | | | | Patch by Nathan Jeffords! llvm-svn: 114661
* Rework passing parent pointers into complexpatterns, I forgotChris Lattner2010-09-211-27/+35
| | | | | | | | that complex patterns are matched after the entire pattern has a structural match, therefore the NodeStack isn't in a useful state when the actual call to the matcher happens. llvm-svn: 114489
* If only user of a vreg is an copy instruction to export copy of vreg out of ↵Devang Patel2010-09-211-0/+23
| | | | | | | | | current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. Testcase is in r114476. This fixes radar 8412415. llvm-svn: 114478
* correct this logic.Chris Lattner2010-09-211-2/+2
| | | | llvm-svn: 114474
* just like they can opt into getting the root of the pattern beingChris Lattner2010-09-211-1/+5
| | | | | | | matched, allow ComplexPatterns to opt into getting the parent node of the operand being matched. llvm-svn: 114472
* implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner2010-09-051-1/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. llvm-svn: 113102
* zap dead code.Chris Lattner2010-08-261-32/+0
| | | | llvm-svn: 112155
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* Add an ILP scheduler. This is a register pressure aware scheduler that'sEvan Cheng2010-07-241-2/+4
| | | | | | | | | | | | appropriate for targets without detailed instruction iterineries. The scheduler schedules for increased instruction level parallelism in low register pressure situation; it schedules to reduce register pressure when the register pressure becomes high. On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2 by 16%. llvm-svn: 109300
* mass elimination of reliance on automatic iterator dereferencingGabor Greif2010-07-221-1/+1
| | | | llvm-svn: 109103
* Use the source-order scheduler instead of the "fast" scheduler at -O0,Dan Gohman2010-07-161-1/+1
| | | | | | | because it's more likely to keep debug line information in its original order. llvm-svn: 108496
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-76/+119
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* Clarify what mysterious check means.Bill Wendling2010-07-091-0/+3
| | | | llvm-svn: 108005
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-119/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h llvm-svn: 107987
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-76/+119
| | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. llvm-svn: 107943
* Extension of r107506. Make sure that we don't mark a function as having a callBill Wendling2010-07-081-1/+2
| | | | | | if the inline ASM doesn't need a stack frame. llvm-svn: 107922
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-94/+86
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* Fix -fast-isel-abort to check the right instruction.Dan Gohman2010-07-071-1/+1
| | | | llvm-svn: 107839
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-37/+41
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Update the insert position after scheduling, which may change theDan Gohman2010-07-071-0/+1
| | | | | | | position when emitting multiple blocks when executing a custom inserter. llvm-svn: 107797
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-071-53/+56
| | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. llvm-svn: 107791
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-071-7/+1
| | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. llvm-svn: 107789
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-071-1/+1
| | | | | | allow target-specific fast-isel code to make use of it directly. llvm-svn: 107787
* CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.Dan Gohman2010-07-061-3/+2
| | | | | | SelectBasicBlock doesn't needs its BasicBlock argument. llvm-svn: 107712
* Proper indentation.Bill Wendling2010-07-041-1/+1
| | | | llvm-svn: 107581
* Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen2010-07-021-0/+1
| | | | | | | | | | | | | | | | | | | PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. llvm-svn: 107506
* Rename CreateReg to CreateRegs, and MakeReg to CreateReg.Dan Gohman2010-07-021-1/+1
| | | | llvm-svn: 107451
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