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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Remove comparison methods for MVT. The main causeDuncan Sands2008-06-081-19/+17
| | | | | | | | | | | of apint codegen failure is the DAG combiner doing the wrong thing because it was comparing MVT's using < rather than comparing the number of bits. Removing the < method makes this mistake impossible to commit. Instead, add helper methods for comparing bits and use them. llvm-svn: 52098
* CodeGen support for insertvalue and extractvalue, and for loads andDan Gohman2008-06-071-26/+233
| | | | | | stores of aggregate values. llvm-svn: 52069
* Connect successors before creating the DAG node for the branch. This hasOwen Anderson2008-06-071-22/+24
| | | | | | | no visible functionality change, but enables a future patch where node creation will update the CFG if it decides to create an unconditional rather than a conditional branch. llvm-svn: 52067
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-145/+145
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Use isSingleValueType instead of isFirstClassType toDan Gohman2008-05-231-2/+2
| | | | | | exclude struct and array types. llvm-svn: 51460
* IR support for extractvalue and insertvalue instructions. Also, beginDan Gohman2008-05-151-0/+13
| | | | | | moving toward making structs and arrays first-class types. llvm-svn: 51157
* Really silence compiler warnings.Evan Cheng2008-05-141-2/+2
| | | | llvm-svn: 51126
* Silence some compiler warnings.Evan Cheng2008-05-141-4/+4
| | | | llvm-svn: 51115
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-131-12/+10
| | | | | | | several things that were neither in an anonymous namespace nor static but not intended to be global. llvm-svn: 51017
* Add support for vicmp/vfcmp codegen, more legalize support coming.Nate Begeman2008-05-121-0/+71
| | | | | | This is necessary to unbreak the build. llvm-svn: 50988
* Turn StripPointerCast() into a methodAnton Korobeynikov2008-05-071-2/+2
| | | | llvm-svn: 50836
* Make StripPointerCast a common function (should we mak it method of Value ↵Anton Korobeynikov2008-05-061-3/+2
| | | | | | instead?) llvm-svn: 50775
* Make several variable declarations static.Dan Gohman2008-05-061-2/+2
| | | | llvm-svn: 50696
* Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang2008-05-051-23/+40
| | | | llvm-svn: 50663
* Use push_back(...) instead of resize(1, ...), per review feedback.Dan Gohman2008-05-021-2/+2
| | | | llvm-svn: 50561
* Fix uninitialized uses of the FPC variable.Dan Gohman2008-05-011-2/+2
| | | | llvm-svn: 50558
* don't randomly miscompile seto/setuo just because we are in Chris Lattner2008-05-011-4/+4
| | | | | | | | | ffastmath mode. This fixes rdar://5902801, a miscompilation of gcc.dg/builtins-8.c. Bill, please pull this into Tak. llvm-svn: 50523
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-6/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
* make the vector conversion magic handle multiple results.Chris Lattner2008-04-291-7/+16
| | | | | | | | | | | | | | | | | | | | | We now compile test2/test3 to: _test2: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End addps %xmm1, %xmm0 ret _test3: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End paddd %xmm1, %xmm0 ret as expected. llvm-svn: 50389
* add support for multiple return values in inline asm. This is a step Chris Lattner2008-04-291-12/+19
| | | | | | | | | | | | | | | | | | towards PR2094. It now compiles the attached .ll file to: _sad16_sse2: movslq %ecx, %rax ## InlineAsm Start %ecx %rdx %rax %rax %r8d %rdx %rsi ## InlineAsm End ## InlineAsm Start set %eax ## InlineAsm End ret which is pretty decent for a 3 output, 4 input asm. llvm-svn: 50386
* Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling ↵Evan Cheng2008-04-281-2/+12
| | | | | | | | | | | | | | units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs: c1, f1 = CopyToReg c2, f2 = CopyToReg c3 = TokenFactor c1, c2 ... = user c3, ..., f2 Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes. llvm-svn: 50376
* Delete an unused constructor.Dan Gohman2008-04-281-3/+0
| | | | llvm-svn: 50367
* Add a comment to CreateRegForValue that clarifies the handling ofDan Gohman2008-04-281-0/+4
| | | | | | aggregate types. llvm-svn: 50366
* Rewrite the comments for RegsForValue and its members, andDan Gohman2008-04-281-20/+30
| | | | | | reorder some of the members for clarity. llvm-svn: 50365
* Don't call size() on each iteration of the loop.Dan Gohman2008-04-281-2/+2
| | | | llvm-svn: 50361
* Another collection of random cleanups. No functionality change.Chris Lattner2008-04-281-64/+61
| | | | llvm-svn: 50341
* Remove the SmallVector ctor that converts from a SmallVectorImpl. ThisChris Lattner2008-04-281-48/+53
| | | | | | | | | | conversion open the door for many nasty implicit conversion issues, and can be easily solved by initializing with (V.begin(), V.end()) when needed. This patch includes many small cleanups for sdisel also. llvm-svn: 50340
* switch RegsForValue::Regs to be a SmallVector to avoidChris Lattner2008-04-281-4/+4
| | | | | | heap thrash on tiny (usually single-element) vectors. llvm-svn: 50335
* move static function out of anon namespace, no functionality change.Chris Lattner2008-04-271-25/+23
| | | | llvm-svn: 50330
* Another step to getting multiple result inline asm to work.Chris Lattner2008-04-271-6/+14
| | | | llvm-svn: 50329
* Implement a signficant optimization for inline asm:Chris Lattner2008-04-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When choosing between constraints with multiple options, like "ir", test to see if we can use the 'i' constraint and go with that if possible. This produces more optimal ASM in all cases (sparing a register and an instruction to load it), and fixes inline asm like this: void test () { asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14)); } Previously we would dump "42" into a memory location (which is ok for the 'm' constraint) which would cause a problem because the 'c' modifier is not valid on memory operands. Isn't it great how inline asm turns 'missed optimization' into 'compile failed'?? Incidentally, this was the todo in PowerPC/2007-04-24-InlineAsm-I-Modifier.ll Please do NOT pull this into Tak. llvm-svn: 50315
* isa+cast -> dyn_castChris Lattner2008-04-271-4/+2
| | | | llvm-svn: 50314
* Move a bunch of inline asm code out of line.Chris Lattner2008-04-271-1/+1
| | | | llvm-svn: 50313
* Remove the code from CodeGenPrepare that moved getresult instructionsDan Gohman2008-04-251-83/+156
| | | | | | | | | | | to the block that defines their operands. This doesn't work in the case that the operand is an invoke, because invoke is a terminator and must be the last instruction in a block. Replace it with support in SelectionDAGISel for copying struct values into sequences of virtual registers. llvm-svn: 50279
* Use isa instead of dyn_cast.Dan Gohman2008-04-231-1/+1
| | | | llvm-svn: 50181
* Add support to codegen for getresult instructions with undef operands.Dan Gohman2008-04-231-2/+7
| | | | llvm-svn: 50180
* Change Divided flag to Split, as suggested by EvanNicolas Geoffray2008-04-151-2/+2
| | | | llvm-svn: 49715
* Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32Nicolas Geoffray2008-04-141-4/+4
| | | | llvm-svn: 49652
* Add a divided flag for the first piece of an argument divided into mulitple ↵Nicolas Geoffray2008-04-131-2/+7
| | | | | | parts. Fixes PR1643 llvm-svn: 49611
* Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not LegalDan Gohman2008-04-121-245/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | on any current target and aren't optimized in DAGCombiner. Instead of using intermediate nodes, expand the operations, choosing between simple loads/stores, target-specific code, and library calls, immediately. Previously, the code to emit optimized code for these operations was only used at initial SelectionDAG construction time; now it is used at all times. This fixes some cases where rep;movs was being used for small copies where simple loads/stores would be better. This also cleans up code that checks for alignments less than 4; let the targets make that decision instead of doing it in target-independent code. This allows x86 to use rep;movs in low-alignment cases. Also, this fixes a bug that resulted in the use of rep;stos for memsets of 0 with non-constant memory size when the alignment was at least 4. It's better to use the library in this case, which can be significantly faster when the size is large. This also preserves more SourceValue information when memory intrinsics are lowered into simple loads/stores. llvm-svn: 49572
* Make sure both PendingLoads and PendingExports are flushedDale Johannesen2008-04-041-1/+4
| | | | | | | | | | before an invoke. Failure to do this causes references in the landing pad to variables that were not set. Fixes g++.dg/eh/delayslot1.C g++.dg/eh/fp-regs.C g++.old-deja/g++.brendan/eh1.C llvm-svn: 49243
* Recommitting EH patch; this should answer most of theDale Johannesen2008-04-021-51/+41
| | | | | | | | | | | | | | | review feedback. -enable-eh is still accepted but doesn't do anything. EH intrinsics use Dwarf EH if the target supports that, and are handled by LowerInvoke otherwise. The separation of the EH table and frame move data is, I think, logically figured out, but either one still causes full EH info to be generated (not sure how to split the metadata correctly). MachineModuleInfo::needsFrameInfo is no longer used and is removed. llvm-svn: 49064
* Revert 49006 for the moment.Dale Johannesen2008-04-011-13/+8
| | | | llvm-svn: 49046
* Emit exception handling info for functions which areDale Johannesen2008-03-311-8/+13
| | | | | | | | | | | not marked nounwind, or for all functions when -enable-eh is set, provided the target supports Dwarf EH. llvm-gcc generates nounwind in the right places; other FEs will need to do so also. Given such a FE, -enable-eh should no longer be needed. llvm-svn: 49006
* Fix "Control reaches the end of non-void function" warnings, Chris Lattner2008-03-301-0/+1
| | | | | | patch by David Chisnall. llvm-svn: 48963
* Avoid creating chain dependencies from CopyToReg nodes to load and storeDan Gohman2008-03-271-54/+72
| | | | | | | | | | | | | | | | | | nodes. This doesn't currently have much impact the generated code, but it does produce simpler-looking SelectionDAGs, and consequently simpler-looking ScheduleDAGs, because there are fewer spurious dependencies. In particular, CopyValueToVirtualRegister now uses the entry node as the input chain dependency for new CopyToReg nodes instead of calling getRoot and depending on the most recent memory reference. Also, rename UnorderedChains to PendingExports and pull it up from being a local variable in SelectionDAGISel::BuildSelectionDAG to being a member variable of SelectionDAGISel, so that it doesn't have to be passed around to all the places that need it. llvm-svn: 48893
* Introduce a new node for holding call argumentDuncan Sands2008-03-211-42/+32
| | | | | | | | | | | | | | | | | flags. This is needed by the new legalize types infrastructure which wants to expand the 64 bit constants previously used to hold the flags on 32 bit machines. There are two functional changes: (1) in LowerArguments, if a parameter has the zext attribute set then that is marked in the flags; before it was being ignored; (2) PPC had some bogus code for handling two word arguments when using the ELF 32 ABI, which was hard to convert because of the bogusness. As suggested by the original author (Nicolas Geoffray), I've disabled it for the moment. Tested with "make check" and the Ada ACATS testsuite. llvm-svn: 48640
* Do not generate special entries in the dwarf ehDuncan Sands2008-03-141-6/+2
| | | | | | table for nounwind calls. llvm-svn: 48373
* Don't try to extract an i32 from an f64. ThisDuncan Sands2008-03-121-10/+16
| | | | | | | | | | | | getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. llvm-svn: 48294
* Initial codegen support for functions and calls with multiple return values.Dan Gohman2008-03-111-18/+51
| | | | llvm-svn: 48244
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