| Commit message (Collapse) | Author | Age | Files | Lines | 
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llvm-svn: 62127
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llvm-svn: 61999
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llvm-svn: 61715
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target constants are allowed to have an illegal
type.
llvm-svn: 61006
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Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll
Failed with exit(1) at line 1
while running:  llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll |  llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493.
0   llc               0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98
1   llc               0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593
2   libSystem.B.dylib 0x96cac09b _sigtramp + 43
3   libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4   libSystem.B.dylib 0x96d24ec2 raise + 26
5   libSystem.B.dylib 0x96d3447f abort + 73
6   libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7   llc               0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub
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llvm-svn: 61001
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types into the DAG if they were not already there.
Check this with an assertion.
llvm-svn: 60997
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(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.
llvm-svn: 59960
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dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.
llvm-svn: 59700
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is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.
This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.
The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.
llvm-svn: 59676
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special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
llvm-svn: 59190
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argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.
llvm-svn: 59055
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EnableFastISelAbort variables for Release mode instead of
using ifdefs in the code.
llvm-svn: 58350
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llvm-svn: 58340
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codegen infrastructure, by default.  Please report
any breakage to the mailing lists.
llvm-svn: 58232
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llvm-svn: 57845
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- Move the EH landing-pad code and adjust it so that it works
   with FastISel as well as with SDISel.
 - Add FastISel support for @llvm.eh.exception and
   @llvm.eh.selector.
llvm-svn: 57539
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instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
llvm-svn: 57521
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expand to multiple basic blocks, in which case fast-isel
needs to informed of which block to use as it resumes
inserting instructions.
llvm-svn: 57040
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in functions with PIC references from more than one basic block.
llvm-svn: 56807
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s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
llvm-svn: 56622
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llvm-svn: 56614
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llvm-svn: 56613
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llvm-svn: 56610
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llvm-svn: 56604
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RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.
llvm-svn: 56539
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llvm-svn: 56513
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object. This will be needed to support debug info.
llvm-svn: 56508
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with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.
llvm-svn: 56290
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are not enabled. Instead just omit the tail call flag when calls are
created.
llvm-svn: 56235
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Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
llvm-svn: 56183
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with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
llvm-svn: 56159
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to static allocas. As part of this change, refactor the
address mode code for laods and stores.
llvm-svn: 56066
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I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.
llvm-svn: 56057
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to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.
llvm-svn: 56029
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-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.
llvm-svn: 56021
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the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.
llvm-svn: 55977
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llvm-svn: 55942
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llvm-svn: 55911
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out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.
llvm-svn: 55863
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llvm-svn: 55779
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HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
llvm-svn: 55746
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and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.
llvm-svn: 55701
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llvm-svn: 55692
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even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 
llvm-svn: 55641
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llvm-svn: 55512
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Node to reflect semantics
llvm-svn: 55504
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SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.
llvm-svn: 55497
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were being emitted after the first instructions of the entry block.
llvm-svn: 55496
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llvm-svn: 55483
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llvm-svn: 55471
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