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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Rather than having a different custom legalizationDuncan Sands2008-07-041-6/+0
| | | | | | | | | | | | hook for each way in which a result type can be legalized (promotion, expansion, softening etc), just use one: ReplaceNodeResults, which returns a node with exactly the same result types as the node passed to it, but presumably with a bunch of custom code behind the scenes. No change if the new LegalizeTypes infrastructure is not turned on. llvm-svn: 53137
* Revert my previous check-in that split up MachineModuleInfo. It turns out toBill Wendling2008-07-031-1/+0
| | | | | | slow the compiler down at -O0 some 30% or more. Ooops. llvm-svn: 53120
* Add a new getMergeValues method that does not needDuncan Sands2008-07-021-24/+6
| | | | | | | | | | to be passed the list of value types, and use this where appropriate. Inappropriate places are where the value type list is already known and may be long, in which case the existing method is more efficient. llvm-svn: 53035
* Do run ComputeLiveOutVRegInfo with -fast.Evan Cheng2008-07-011-1/+1
| | | | llvm-svn: 52975
* Do not use computationally expensive scheduling heuristics with -fast.Evan Cheng2008-07-011-4/+5
| | | | llvm-svn: 52971
* Apply Chris' suggestion.Evan Cheng2008-07-011-32/+36
| | | | llvm-svn: 52970
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-15/+5
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Use a simpler but equivalent form of RecordSource.Dan Gohman2008-06-301-2/+1
| | | | llvm-svn: 52931
* Add timing report for various sub-passes under SelectionDAGISel.Evan Cheng2008-06-301-0/+26
| | | | llvm-svn: 52930
* Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect itsDan Gohman2008-06-301-12/+4
| | | | | | | | | | | | | | | | | purpose, and give it a custom SDNode subclass so that it doesn't need to have line number, column number, filename string, and directory string, all existing as individual SDNodes to be the operands. This was the only user of ISD::STRING, StringSDNode, etc., so remove those and some associated code. This makes stop-points considerably easier to read in -view-legalize-dags output, and reduces overhead (creating new nodes and copying std::strings into them) on code containing debugging information. llvm-svn: 52924
* Split scheduling from instruction selection.Evan Cheng2008-06-301-3/+11
| | | | llvm-svn: 52923
* Replace some std::vectors that showed up in heap profiling withDan Gohman2008-06-301-10/+9
| | | | | | | | SmallVectors. Change the signature of TargetLowering::LowerArguments to avoid returning a vector by value, and update the two targets which still use this directly, Sparc and IA64, accordingly. llvm-svn: 52917
* Revert the SelectionDAG optimization that makesDuncan Sands2008-06-301-29/+20
| | | | | | | | | | | | | | | | | | it impossible to create a MERGE_VALUES node with only one result: sometimes it is useful to be able to create a node with only one result out of one of the results of a node with more than one result, for example because the new node will eventually be used to replace a one-result node using ReplaceAllUsesWith, cf X86TargetLowering::ExpandFP_TO_SINT. On the other hand, most users of MERGE_VALUES don't need this and for them the optimization was valuable. So add a new utility method getMergeValues for creating MERGE_VALUES nodes which by default performs the optimization. Change almost everywhere to use getMergeValues (and tidy some stuff up at the same time). llvm-svn: 52893
* Refactor the DebugInfoDesc stuff out of the MachineModuleInfo file. Clean upBill Wendling2008-06-271-0/+1
| | | | | | some uses of std::vector, where it's return std::vector by value. Yuck! llvm-svn: 52800
* Remove the OrigVT member from AtomicSDNode, as it is redundant withDan Gohman2008-06-251-4/+2
| | | | | | the base SDNode's VTList. llvm-svn: 52722
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-251-8/+10
| | | | | | | | Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub llvm-svn: 52706
* Teach ReturnInst lowering about aggregate return values.Dan Gohman2008-06-201-22/+28
| | | | llvm-svn: 52522
* Fix the index calculations for the extractvalue lowering code.Dan Gohman2008-06-201-2/+2
| | | | llvm-svn: 52517
* Simplify the ComputeLinearIndex logic and fix a few bugs.Dan Gohman2008-06-201-16/+10
| | | | llvm-svn: 52516
* add a new -enable-value-prop flag for llcbeta, that enables propagationChris Lattner2008-06-171-12/+132
| | | | | | | | | | | of value info (sign/zero ext info) from one MBB to another. This doesn't handle much right now because of two limitations: 1) only handles zext/sext, not random bit propagation (no assert exists for this) 2) doesn't handle phis. llvm-svn: 52383
* Fix spelling.Duncan Sands2008-06-171-1/+1
| | | | llvm-svn: 52381
* add missing atomic intrinsic from gccAndrew Lenharth2008-06-141-0/+2
| | | | llvm-svn: 52270
* CodeGen support for aggregate-value function arguments.Dan Gohman2008-06-091-112/+139
| | | | llvm-svn: 52156
* Handle empty aggregate values.Dan Gohman2008-06-091-21/+22
| | | | llvm-svn: 52150
* Remove comparison methods for MVT. The main causeDuncan Sands2008-06-081-19/+17
| | | | | | | | | | | of apint codegen failure is the DAG combiner doing the wrong thing because it was comparing MVT's using < rather than comparing the number of bits. Removing the < method makes this mistake impossible to commit. Instead, add helper methods for comparing bits and use them. llvm-svn: 52098
* CodeGen support for insertvalue and extractvalue, and for loads andDan Gohman2008-06-071-26/+233
| | | | | | stores of aggregate values. llvm-svn: 52069
* Connect successors before creating the DAG node for the branch. This hasOwen Anderson2008-06-071-22/+24
| | | | | | | no visible functionality change, but enables a future patch where node creation will update the CFG if it decides to create an unconditional rather than a conditional branch. llvm-svn: 52067
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-145/+145
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Use isSingleValueType instead of isFirstClassType toDan Gohman2008-05-231-2/+2
| | | | | | exclude struct and array types. llvm-svn: 51460
* IR support for extractvalue and insertvalue instructions. Also, beginDan Gohman2008-05-151-0/+13
| | | | | | moving toward making structs and arrays first-class types. llvm-svn: 51157
* Really silence compiler warnings.Evan Cheng2008-05-141-2/+2
| | | | llvm-svn: 51126
* Silence some compiler warnings.Evan Cheng2008-05-141-4/+4
| | | | llvm-svn: 51115
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-131-12/+10
| | | | | | | several things that were neither in an anonymous namespace nor static but not intended to be global. llvm-svn: 51017
* Add support for vicmp/vfcmp codegen, more legalize support coming.Nate Begeman2008-05-121-0/+71
| | | | | | This is necessary to unbreak the build. llvm-svn: 50988
* Turn StripPointerCast() into a methodAnton Korobeynikov2008-05-071-2/+2
| | | | llvm-svn: 50836
* Make StripPointerCast a common function (should we mak it method of Value ↵Anton Korobeynikov2008-05-061-3/+2
| | | | | | instead?) llvm-svn: 50775
* Make several variable declarations static.Dan Gohman2008-05-061-2/+2
| | | | llvm-svn: 50696
* Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang2008-05-051-23/+40
| | | | llvm-svn: 50663
* Use push_back(...) instead of resize(1, ...), per review feedback.Dan Gohman2008-05-021-2/+2
| | | | llvm-svn: 50561
* Fix uninitialized uses of the FPC variable.Dan Gohman2008-05-011-2/+2
| | | | llvm-svn: 50558
* don't randomly miscompile seto/setuo just because we are in Chris Lattner2008-05-011-4/+4
| | | | | | | | | ffastmath mode. This fixes rdar://5902801, a miscompilation of gcc.dg/builtins-8.c. Bill, please pull this into Tak. llvm-svn: 50523
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-6/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
* make the vector conversion magic handle multiple results.Chris Lattner2008-04-291-7/+16
| | | | | | | | | | | | | | | | | | | | | We now compile test2/test3 to: _test2: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End addps %xmm1, %xmm0 ret _test3: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End paddd %xmm1, %xmm0 ret as expected. llvm-svn: 50389
* add support for multiple return values in inline asm. This is a step Chris Lattner2008-04-291-12/+19
| | | | | | | | | | | | | | | | | | towards PR2094. It now compiles the attached .ll file to: _sad16_sse2: movslq %ecx, %rax ## InlineAsm Start %ecx %rdx %rax %rax %r8d %rdx %rsi ## InlineAsm End ## InlineAsm Start set %eax ## InlineAsm End ret which is pretty decent for a 3 output, 4 input asm. llvm-svn: 50386
* Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling ↵Evan Cheng2008-04-281-2/+12
| | | | | | | | | | | | | | units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs: c1, f1 = CopyToReg c2, f2 = CopyToReg c3 = TokenFactor c1, c2 ... = user c3, ..., f2 Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes. llvm-svn: 50376
* Delete an unused constructor.Dan Gohman2008-04-281-3/+0
| | | | llvm-svn: 50367
* Add a comment to CreateRegForValue that clarifies the handling ofDan Gohman2008-04-281-0/+4
| | | | | | aggregate types. llvm-svn: 50366
* Rewrite the comments for RegsForValue and its members, andDan Gohman2008-04-281-20/+30
| | | | | | reorder some of the members for clarity. llvm-svn: 50365
* Don't call size() on each iteration of the loop.Dan Gohman2008-04-281-2/+2
| | | | llvm-svn: 50361
* Another collection of random cleanups. No functionality change.Chris Lattner2008-04-281-64/+61
| | | | llvm-svn: 50341
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