| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
|
|
|
| |
FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
llvm-svn: 102109
|
|
|
|
|
|
| |
SelectionDAG directory and into a new Analysis.cpp file.
llvm-svn: 101975
|
|
|
|
|
|
|
|
| |
into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.
llvm-svn: 101906
|
|
|
|
|
|
| |
they end up doing nothing.
llvm-svn: 101904
|
|
|
|
|
|
| |
SelectionDAGBuilder, where it doesn't have to be as complicated.
llvm-svn: 101848
|
|
|
|
|
|
|
| |
need it, just pass around the parent block of the current instruction
explicitly.
llvm-svn: 101822
|
|
|
|
|
|
| |
than just getting one through a TargetLowering.
llvm-svn: 101802
|
|
|
|
|
|
| |
SelectionDAG-specific.
llvm-svn: 101801
|
|
|
|
| |
llvm-svn: 101637
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
|
|
|
|
|
|
|
| |
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
llvm-svn: 101579
|
|
|
|
| |
llvm-svn: 101480
|
|
|
|
| |
llvm-svn: 101478
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101465
|
|
|
|
| |
llvm-svn: 101434
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101397
|
|
|
|
| |
llvm-svn: 101368
|
|
|
|
|
|
|
|
|
|
| |
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101364
|
|
|
|
| |
llvm-svn: 101342
|
|
|
|
| |
llvm-svn: 101334
|
|
|
|
| |
llvm-svn: 101276
|
|
|
|
|
|
|
| |
SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.
llvm-svn: 101267
|
|
|
|
| |
llvm-svn: 101266
|
|
|
|
| |
llvm-svn: 100824
|
|
|
|
|
|
| |
readability.
llvm-svn: 100756
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
so the user at least knows what inline asm is a problem. For example:
error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
asm ("\n" : "+r" (stack->regs)
^
Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!
llvm-svn: 100731
|
|
|
|
| |
llvm-svn: 100725
|
|
|
|
| |
llvm-svn: 100709
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
llvm-svn: 100605
|
|
|
|
| |
llvm-svn: 100419
|
|
|
|
| |
llvm-svn: 100382
|
|
|
|
|
|
|
| |
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100304
|
|
|
|
| |
llvm-svn: 100215
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
representation. This eliminates the 'DILocation' MDNodes for
file/line/col tuples from -O0 -g codegen.
This remove the old DebugLoc class, making it a typedef for DebugLoc,
I'll rename NewDebugLoc next.
I didn't update the JIT to use the new apis, so it will continue to
work, but be as slow as before. Someone should eventually do this
or, better yet, rip out the JIT debug info stuff and build the JIT
on top of MC.
llvm-svn: 100209
|
|
|
|
| |
llvm-svn: 100199
|
|
|
|
|
|
|
| |
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100191
|
|
|
|
|
|
|
|
|
| |
instructions. In addition to being a convenience,
they are faster than the old apis, particularly when
not going from an MDKindID like people should be
doing.
llvm-svn: 99982
|
|
|
|
| |
llvm-svn: 99948
|
|
|
|
|
|
|
|
|
| |
memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.
llvm-svn: 99928
|
|
|
|
| |
llvm-svn: 99840
|
|
|
|
| |
llvm-svn: 99836
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
Here is a theoretical example that illustrates why the placement is important.
tmp1 =
store tmp1 -> x
...
tmp2 = add ...
...
call
...
store tmp2 -> x
Now mem2reg comes along:
tmp1 =
dbg_value (tmp1 -> x)
...
tmp2 = add ...
...
call
...
dbg_value (tmp2 -> x)
When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1.
Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers").
This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed.
llvm-svn: 99469
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
always create a new jump table. The intention was to avoid merging jump
tables in SelectionDAGBuilder, and to wait for the branch folding pass to
merge tables. Unfortunately, the same getJumpTableIndex() method is also
used to merge tables in branch folding, so as a result of this change
branch tables are never merged. Worse, the branch folding code is expecting
getJumpTableIndex to always return the index of an existing table, but with
this change, it never does so. In at least some cases, e.g., pr6543, this
creates references to non-existent tables.
I've fixed the problem by adding a new createJumpTableIndex function, which
will always create a new table, and I've changed getJumpTableIndex to only
look at existing tables.
llvm-svn: 98845
|
|
|
|
| |
llvm-svn: 98830
|
|
|
|
| |
llvm-svn: 98778
|
|
|
|
|
|
| |
handling constant unions.
llvm-svn: 98680
|
|
|
|
| |
llvm-svn: 98662
|
|
|
|
| |
llvm-svn: 98656
|
|
|
|
|
|
|
|
| |
DAG nodes.
This is a work in progress. Patch by Dale Johannesen!
llvm-svn: 98568
|
|
|
|
|
|
|
| |
with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.
llvm-svn: 98514
|