| Commit message (Collapse) | Author | Age | Files | Lines |
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code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.
Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.
llvm-svn: 102814
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llvm-svn: 102810
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llvm-svn: 102661
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entry block.
llvm-svn: 102653
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llvm-svn: 102602
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llvm-svn: 102590
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llvm-svn: 102585
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entry block.
llvm-svn: 102581
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llvm-svn: 102573
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llvm-svn: 102558
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instructions for function arguments early and insert them after instruction selection is done.
llvm-svn: 102554
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llvm-svn: 102463
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of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
llvm-svn: 102410
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llvm-svn: 102380
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produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
llvm-svn: 102372
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into SelectionDAGBuilder itself.
llvm-svn: 102128
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and into SelectionDAGBuilder and FastISel.
llvm-svn: 102123
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FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
llvm-svn: 102109
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SelectionDAG directory and into a new Analysis.cpp file.
llvm-svn: 101975
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into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.
llvm-svn: 101906
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they end up doing nothing.
llvm-svn: 101904
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SelectionDAGBuilder, where it doesn't have to be as complicated.
llvm-svn: 101848
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need it, just pass around the parent block of the current instruction
explicitly.
llvm-svn: 101822
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than just getting one through a TargetLowering.
llvm-svn: 101802
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SelectionDAG-specific.
llvm-svn: 101801
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llvm-svn: 101637
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
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Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
llvm-svn: 101579
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llvm-svn: 101480
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llvm-svn: 101478
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with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101465
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llvm-svn: 101434
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with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101397
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llvm-svn: 101368
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of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101364
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llvm-svn: 101342
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llvm-svn: 101334
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llvm-svn: 101276
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SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.
llvm-svn: 101267
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llvm-svn: 101266
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llvm-svn: 100824
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readability.
llvm-svn: 100756
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so the user at least knows what inline asm is a problem. For example:
error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
asm ("\n" : "+r" (stack->regs)
^
Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!
llvm-svn: 100731
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llvm-svn: 100725
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llvm-svn: 100709
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1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
llvm-svn: 100605
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llvm-svn: 100419
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llvm-svn: 100382
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Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100304
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llvm-svn: 100215
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