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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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* ComputeLinearIndex doesn't need its TLI argument.Dan Gohman2010-10-061-4/+2
| | | | llvm-svn: 115792
* Fix code gen crash reported in PR 8235. We still lose debug info for the ↵Devang Patel2010-10-011-0/+3
| | | | | | unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case. llvm-svn: 115323
* typoGabor Greif2010-10-011-1/+1
| | | | llvm-svn: 115310
* fix typoChris Lattner2010-10-011-1/+1
| | | | llvm-svn: 115300
* Massive rewrite of MMX: Dale Johannesen2010-09-301-0/+60
| | | | | | | | | | | | | | | | | | | The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. llvm-svn: 115243
* When isel is emitting instructions for an x86 target without CMOV, the CFG isJakob Stoklund Olesen2010-09-301-0/+13
| | | | | | | | | | | | | | | | | edited during emission. If the basic block ends in a switch that gets lowered to a jump table, any phis at the default edge were getting updated wrong. The jump table data structure keeps a pointer to the header blocks that wasn't getting updated after the MBB is split. This bug was exposed on 32-bit Linux when disabling critical edge splitting in codegen prepare. The fix is to uipdate stale MBB pointers whenever a block is split during emission. llvm-svn: 115191
* Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.John Thompson2010-09-241-0/+20
| | | | llvm-svn: 114767
* Get rid of pop_macro warnings on MSVC.Michael J. Spencer2010-09-241-3/+5
| | | | llvm-svn: 114750
* Revert 114634 for now since buildbot claim it broke Clang self-hosting. I ↵Evan Cheng2010-09-231-4/+6
| | | | | | doubt it but it's possible it's exposing another bug somewhere. llvm-svn: 114681
* Follow up to r114630. Do not optimize away unconditional branch following a ↵Evan Cheng2010-09-231-6/+4
| | | | | | conditional one. llvm-svn: 114634
* SDISel should not optimize a unconditional branch following a conditional branchEvan Cheng2010-09-231-4/+5
| | | | | | | | | | | | when the unconditional branch destination is the fallthrough block. The canonicalization makes it easier to allow optimizations on DAGs to invert conditional branches. The branch folding pass (and AnalyzeBranch) will clean up the unnecessary unconditional branches later. This is one of the patches leading up to disabling codegen prepare critical edge splitting. llvm-svn: 114630
* finish pushing MachinePointerInfo through selectiondags. At this point,Chris Lattner2010-09-211-6/+7
| | | | | | | I think I've audited all uses, so it should be dependable for address spaces, and the pointer+offset info should also be accurate when there. llvm-svn: 114464
* Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON loadBob Wilson2010-09-211-1/+2
| | | | | | and store intrinsics are represented with MemIntrinsicSDNodes. llvm-svn: 114454
* continue MachinePointerInfo'izing, eliminating use of one of the oldChris Lattner2010-09-211-6/+10
| | | | | | getLoad overloads. llvm-svn: 114443
* reimplement memcpy/memmove/memset lowering to use MachinePointerInfoChris Lattner2010-09-211-5/+7
| | | | | | | instead of srcvalue/offset pairs. This corrects SV info for mem operations whose size is > 32-bits. llvm-svn: 114401
* simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a ↵Chris Lattner2010-09-211-1/+2
| | | | | | MachinePointerInfo llvm-svn: 114397
* chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,Chris Lattner2010-09-211-1/+1
| | | | | | eliminating some weird "infer a frame address" logic which was dead. llvm-svn: 114396
* Check bb to ensure that alloca is in separate basic block.Devang Patel2010-09-151-7/+9
| | | | | | This fixes funcargs.exp regression reported by gdb testsuite. llvm-svn: 113992
* If dbg.declare from non-entry block is using alloca from entry block then ↵Devang Patel2010-09-151-2/+14
| | | | | | use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. llvm-svn: 113967
* Added skeleton for inline asm multiple alternative constraint support.John Thompson2010-09-131-45/+32
| | | | llvm-svn: 113766
* Detect undef value early and save unnecessary NodeMap query.Devang Patel2010-09-021-0/+11
| | | | llvm-svn: 112864
* Tidy up.Devang Patel2010-09-021-11/+9
| | | | llvm-svn: 112858
* Reapply r112623. Included additional check for unused byval argument.Devang Patel2010-08-311-1/+19
| | | | llvm-svn: 112659
* Revert r112623. It is causing self host build failures.Devang Patel2010-08-311-16/+1
| | | | llvm-svn: 112631
* Remember byval argument's frame index during argument lowering and use this ↵Devang Patel2010-08-311-1/+16
| | | | | | | | info to emit debug info. Fixes Radar 8367011. llvm-svn: 112623
* Offset is not always unsigned number.Devang Patel2010-08-311-1/+1
| | | | llvm-svn: 112584
* remove unions from LLVM IR. They are severely buggy and notChris Lattner2010-08-281-5/+0
| | | | | | being actively maintained, improved, or extended. llvm-svn: 112356
* Completely disable tail calls when fast-isel is enabled, as fast-iselDan Gohman2010-08-281-0/+5
| | | | | | doesn't currently support dealing with this. llvm-svn: 112341
* Simplify.Devang Patel2010-08-271-4/+1
| | | | llvm-svn: 112305
* Revert r112213. It is not needed.Devang Patel2010-08-261-15/+4
| | | | llvm-svn: 112242
* If node is not available then use FuncInfo.ValueMap to emit debug info for ↵Devang Patel2010-08-261-5/+9
| | | | | | byval parameter. llvm-svn: 112238
* Speculatively revert r112207.Devang Patel2010-08-261-3/+1
| | | | llvm-svn: 112216
* 80 col.Devang Patel2010-08-261-1/+2
| | | | llvm-svn: 112215
* Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.Devang Patel2010-08-261-4/+15
| | | | llvm-svn: 112213
* Donot forget to resolve dangling debug info in a case where virtual ↵Devang Patel2010-08-261-1/+3
| | | | | | register, used for a value, is initialized after a dbg intrinsic is seen. llvm-svn: 112207
* zap dead code.Chris Lattner2010-08-261-5/+0
| | | | llvm-svn: 112155
* Change handling of illegal vector types to widen when possible instead of Chris Lattner2010-08-251-13/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This affects two places in the code: handling cross block values and handling function return and arguments. Since vectors are already widened by legalizetypes, this gives us much better code and unblocks x86-64 abi and SPU abi work. For example, this (which is a silly example of a cross-block value): define <4 x float> @test2(<4 x float> %A) nounwind { %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1> %C = fadd <2 x float> %B, %B br label %BB BB: %D = fadd <2 x float> %C, %C %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ret <4 x float> %E } Now compiles into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 addps %xmm0, %xmm0 ret previously it compiled into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 pshufd $1, %xmm0, %xmm1 ## kill: XMM0<def> XMM0<kill> XMM0<def> insertps $0, %xmm0, %xmm0 insertps $16, %xmm1, %xmm0 addps %xmm0, %xmm0 ret This implements rdar://8230384 llvm-svn: 112101
* Remove dead argument.Devang Patel2010-08-251-4/+3
| | | | llvm-svn: 112085
* split the vector case of getCopyFromParts out to its own function,Chris Lattner2010-08-241-81/+102
| | | | | | no functionality change. llvm-svn: 111994
* split the vector case out of getCopyToParts into its own function. NoChris Lattner2010-08-241-117/+126
| | | | | | functionality change. llvm-svn: 111990
* Handle Values with no value in getCopyFromRegs.Dan Gohman2010-07-261-0/+4
| | | | llvm-svn: 109415
* Propagate alloca alignment information via variable size object frameEric Christopher2010-07-171-1/+1
| | | | | | | | information. No functional change yet. llvm-svn: 108583
* Revert r108369, sorting llvm.dbg.declare information by source position,Dan Gohman2010-07-161-14/+0
| | | | | | | | | | | | | since it doesn't work for front-ends which don't emit column information (which includes llvm-gcc in its present configuration), and doesn't work for clang for K&R style variables where the variables are declared in a different order from the parameter list. Instead, make a separate pass through the instructions to collect the llvm.dbg.declare instructions in order. This ensures that the debug information for variables is emitted in this order. llvm-svn: 108538
* The SelectionDAGBuilder's handling of debug info, on rareDale Johannesen2010-07-161-12/+38
| | | | | | | | | | occasions, caused code to be generated in a different order. All cases I've seen involved float softening in the type legalizer, and this could be perhaps be fixed there, but it's better not to generate things differently in the first place. 7797940 (6/29/2010..7/15/2010). llvm-svn: 108484
* Revert. This isn't the correct way to go.Bill Wendling2010-07-151-14/+0
| | | | llvm-svn: 108478
* Handle code gen for the unreachable instruction if it's the only instruction inBill Wendling2010-07-151-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the function. We'll just turn it into a "trap" instruction instead. The problem with not handling this is that it might generate a prologue without the equivalent epilogue to go with it: $ cat t.ll define void @foo() { entry: unreachable } $ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables .section __TEXT,__text,regular,pure_instructions .globl _foo .align 4, 0x90 _foo: ## @foo Leh_func_begin0: ## BB#0: ## %entry pushq %rbp Ltmp0: movq %rsp, %rbp Ltmp1: Leh_func_end0: ... The unwind tables then have bad data in them causing all sorts of problems. Fixes <rdar://problem/8096481>. llvm-svn: 108473
* 80-col.Eric Christopher2010-07-141-2/+3
| | | | llvm-svn: 108381
* In inline asm treat indirect 'X' constraint as 'm'.Dale Johannesen2010-07-131-3/+5
| | | | | | | This may not be right in all cases, but it's better than asserting which it was doing before. PR 7528. llvm-svn: 108268
* Fix a typo and fit in 80 columns. Found by Bob Wilson.Rafael Espindola2010-07-121-1/+2
| | | | llvm-svn: 108164
* Fix va_arg for doubles. With this patch VAARG nodes always contain theRafael Espindola2010-07-111-1/+2
| | | | | | | | | | | | | | | correct alignment information, which simplifies ExpandRes_VAARG a bit. The patch introduces a new alignment information to TargetLoweringInfo. This is needed since the two natural candidates cannot be used: * The 's' in target data: If this is set to the minimal alignment of any argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for example. * The getTransientStackAlignment method. It is possible for an architecture to have argument less aligned than what we maintain the stack pointer. llvm-svn: 108072
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