| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Remove superfluous SDNode ordering. | Bill Wendling | 2009-12-23 | 1 | -48/+16 | |
| | | | | | llvm-svn: 91971 | |||||
| * | Remove node ordering from inline asm nodes. It's not needed. | Bill Wendling | 2009-12-23 | 1 | -16/+0 | |
| | | | | | llvm-svn: 91961 | |||||
| * | Remove node ordering from VA nodes. It's not needed. | Bill Wendling | 2009-12-23 | 1 | -25/+14 | |
| | | | | | llvm-svn: 91958 | |||||
| * | Assign ordering to SDNodes in PromoteNode. Also fixing a subtle bug where BSWAP | Bill Wendling | 2009-12-22 | 1 | -0/+1 | |
| | | | | | | | was using "Tmp1" in the first getNode call instead of Node->getOperand(0). llvm-svn: 91936 | |||||
| * | Allow 0 as an order number. Don't assign an order to formal arguments. | Bill Wendling | 2009-12-22 | 1 | -17/+10 | |
| | | | | | llvm-svn: 91920 | |||||
| * | Report an error for bad inline assembly, where the value passed for an | Bob Wilson | 2009-12-22 | 1 | -2/+6 | |
| | | | | | | | "indirect" operand is not a pointer. llvm-svn: 91913 | |||||
| * | Add more plumbing. This time in the LowerArguments and "get" functions which | Bill Wendling | 2009-12-22 | 1 | -43/+138 | |
| | | | | | | | | | return partial registers. This affected the back-end lowering code some. Also patch up some places I missed before in the "get" functions. llvm-svn: 91880 | |||||
| * | Add SDNode ordering to inlined asm and VA functions. | Bill Wendling | 2009-12-22 | 1 | -28/+78 | |
| | | | | | llvm-svn: 91876 | |||||
| * | Adding more assignment of ordering to SDNodes. This time in the "call" and | Bill Wendling | 2009-12-22 | 1 | -32/+66 | |
| | | | | | | | generic copy functions. llvm-svn: 91872 | |||||
| * | Add ordering of SDNodes to LowerCallTo. | Bill Wendling | 2009-12-22 | 1 | -19/+44 | |
| | | | | | llvm-svn: 91866 | |||||
| * | Now add ordering to SDNodes created by the massive intrinsic lowering function. | Bill Wendling | 2009-12-22 | 1 | -100/+183 | |
| | | | | | llvm-svn: 91863 | |||||
| * | To make things interesting, I added MORE code to set the ordering of | Bill Wendling | 2009-12-22 | 1 | -32/+387 | |
| | | | | | | | SDNodes. This time in the load/store and limited-precision code. llvm-svn: 91860 | |||||
| * | Add more plumbing to assign ordering to SDNodes. Have the "getValue" method | Bill Wendling | 2009-12-21 | 1 | -59/+133 | |
| | | | | | | | | assign the ordering when called. Combine some of the ordering assignments to keep things simple. llvm-svn: 91857 | |||||
| * | More ordering plumbing. This time for GEP. I need to remember to assign | Bill Wendling | 2009-12-21 | 1 | -4/+32 | |
| | | | | | | | orderings to values returned by getValue(). llvm-svn: 91850 | |||||
| * | Another incremental check-in for assigning ordering to SDNodes. This time for | Bill Wendling | 2009-12-21 | 1 | -25/+75 | |
| | | | | | | | shuffle and insert vector. llvm-svn: 91847 | |||||
| * | Assign ordering to more instructions. Incremental check-in. | Bill Wendling | 2009-12-21 | 1 | -57/+156 | |
| | | | | | llvm-svn: 91846 | |||||
| * | - Add a bit more plumbing assigning an order to SDNodes. | Bill Wendling | 2009-12-21 | 1 | -8/+15 | |
| | | | | | | | - Modify the "dump" method to emit the order of an SDNode. llvm-svn: 91845 | |||||
| * | First wave of plumbing for assigning an ordering to SDNodes. This takes care of | Bill Wendling | 2009-12-21 | 1 | -28/+43 | |
| | | | | | | | a lot of the branching instructions. llvm-svn: 91838 | |||||
| * | Changes from review: | Bill Wendling | 2009-12-18 | 1 | -3/+8 | |
| | | | | | | | | | | | | - Move DisableScheduling flag into TargetOption.h - Move SDNodeOrdering into its own header file. Give it a minimal interface that doesn't conflate construction with storage. - Move assigning the ordering into the SelectionDAGBuilder. This isn't used yet, so there should be no functional changes. llvm-svn: 91727 | |||||
| * | Handle ARM inline asm "w" constraints with 64-bit ("d") registers. | Bob Wilson | 2009-12-18 | 1 | -1/+1 | |
| | | | | | | | | | The change in SelectionDAGBuilder is needed to allow using bitcasts to convert between f64 (the default type for ARM "d" registers) and 64-bit Neon vector types. Radar 7457110. llvm-svn: 91649 | |||||
| * | Fix a comment grammaro. | Bob Wilson | 2009-12-17 | 1 | -2/+2 | |
| | | | | | llvm-svn: 91584 | |||||
| * | Reapply r91392, it was only unmasking the bug, and since TOT is still broken ↵ | Daniel Dunbar | 2009-12-16 | 1 | -0/+3 | |
| | | | | | | | having it reverted does no good. llvm-svn: 91560 | |||||
| * | Revert "Initial work on disabling the scheduler. This is a work in progress, and | Daniel Dunbar | 2009-12-16 | 1 | -3/+0 | |
| | | | | | | | | this", this broke llvm-gcc bootstrap for release builds on x86_64-apple-darwin10. llvm-svn: 91533 | |||||
| * | Initial work on disabling the scheduler. This is a work in progress, and this | Bill Wendling | 2009-12-15 | 1 | -0/+3 | |
| | | | | | | | | | | | | | | | | stuff isn't used just yet. We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2' flags. The hypothesis is that the people who use these flags know what they are doing, and have hand-optimized the C code to reduce latencies and other conflicts. The idea behind our scheme to turn off scheduling is to create a map "on the side" during DAG generation. It will order the nodes by how they appeared in the code. This map is then used during scheduling to get the ordering. llvm-svn: 91392 | |||||
| * | Fix the result type of SELECT nodes lowered from Select instructions with | Dan Gohman | 2009-12-11 | 1 | -1/+1 | |
| | | | | | | | aggregate return values. This fixes PR5754. llvm-svn: 91145 | |||||
| * | Rename SelectionDAGLowering to SelectionDAGBuilder, and rename | Dan Gohman | 2009-11-23 | 1 | -0/+5821 | |
| SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp. llvm-svn: 89681 | ||||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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