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llvm-svn: 101532
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llvm-svn: 101334
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llvm-svn: 101010
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i32 store of immediates.
llvm-svn: 100751
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1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
llvm-svn: 100605
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llvm-svn: 100521
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llvm-svn: 100494
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llvm-svn: 100459
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PR6779
llvm-svn: 100457
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llvm-svn: 100419
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llvm-svn: 100417
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llvm-svn: 100382
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Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100304
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llvm-svn: 100215
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llvm-svn: 100208
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llvm-svn: 100199
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Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100191
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all together.
llvm-svn: 100133
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zero.
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.
llvm-svn: 100118
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1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
llvm-svn: 100090
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llvm-svn: 99948
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memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.
llvm-svn: 99928
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llvm-svn: 99901
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llvm-svn: 99836
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placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
Here is a theoretical example that illustrates why the placement is important.
tmp1 =
store tmp1 -> x
...
tmp2 = add ...
...
call
...
store tmp2 -> x
Now mem2reg comes along:
tmp1 =
dbg_value (tmp1 -> x)
...
tmp2 = add ...
...
call
...
dbg_value (tmp2 -> x)
When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1.
Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers").
This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed.
llvm-svn: 99469
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RecyclingAllocator to allow client code to be simpler, and
simplify several clients.
llvm-svn: 98847
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llvm-svn: 98548
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not all unary nodes necessarily have a simple result type.
llvm-svn: 98547
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llvm-svn: 98513
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llvm-svn: 98501
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an MCSymbol. Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID. Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".
llvm-svn: 98463
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No functional effect yet. This is still evolving and should
not be viewed as final.
llvm-svn: 98195
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llvm-svn: 97914
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llvm-svn: 97735
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CSE and recursive RAUW calls delete a node from the use list,
invalidating the use list iterator. There's currently no known
way to reproduce this in an unmodified LLVM, however there's no
fundamental reason why a SelectionDAG couldn't be formed which
would trigger this case.
llvm-svn: 97665
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llvm-svn: 97536
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(the most general) the others are dead.
llvm-svn: 97511
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llvm-svn: 97441
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case of MorphNodeTo directly.
llvm-svn: 97417
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llvm-svn: 97072
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more elegant.
llvm-svn: 97059
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llvm-svn: 97057
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llvm-svn: 97056
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necessary to swap the operands to handle NaN and negative zero properly.
Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.
llvm-svn: 97025
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llvm-svn: 97019
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creating a new node then replacing uses.
llvm-svn: 97000
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llvm-svn: 96971
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llvm-svn: 96956
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CSE'd or otherwise combined with temporal MemSDNodes.
llvm-svn: 96505
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and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
llvm-svn: 96344
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