| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 21001
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Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
llvm-svn: 20988
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llvm-svn: 20965
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because we were checking the wrong thing. Thanks to andrew for pointing
this out!
llvm-svn: 20554
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This allows the alpha backend to compile:
bool %test(uint %P) {
%c = seteq uint %P, 0
ret bool %c
}
into:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
CMPEQ $0,0,$0
AND $0,1,$0
ret $31,($26),1
instead of:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
ldiq $1,0
ZAP $1,240,$1
CMPEQ $0,$1,$0
AND $0,1,$0
ret $31,($26),1
... and fixes PR534.
llvm-svn: 20534
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for 0.0 and -0.0.
llvm-svn: 20230
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the new TLI that is available.
Implement support for handling out of range shifts. This allows us to
compile this code (a 64-bit rotate):
unsigned long long f3(unsigned long long x) {
return (x << 32) | (x >> (64-32));
}
into this:
f3:
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
ret
GCC produces this:
$ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer
..
f3:
push %ebx
mov %ebx, DWORD PTR [%esp+12]
mov %ecx, DWORD PTR [%esp+8]
mov %eax, %ebx
mov %edx, %ecx
pop %ebx
ret
The Simple ISEL produces (eww gross):
f3:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %ESI, 0
or %EAX, %ECX
or %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
llvm-svn: 19780
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llvm-svn: 19739
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llvm-svn: 19737
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llvm-svn: 19736
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llvm-svn: 19735
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llvm-svn: 19727
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llvm-svn: 19714
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llvm-svn: 19699
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llvm-svn: 19698
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llvm-svn: 19670
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llvm-svn: 19656
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llvm-svn: 19651
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llvm-svn: 19635
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llvm-svn: 19596
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llvm-svn: 19577
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llvm-svn: 19575
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llvm-svn: 19572
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llvm-svn: 19568
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stores/loads.
llvm-svn: 19562
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llvm-svn: 19559
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llvm-svn: 19535
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llvm-svn: 19526
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This fixes llvm-test/SingleSource/Regression/C/casts.c
llvm-svn: 19519
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llvm-svn: 19517
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llvm-svn: 19464
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llvm-svn: 19453
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llvm-svn: 19443
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int test2(int * P, int* Q, int A, int B) {
return P+A == P;
}
into:
test2:
movl 4(%esp), %eax
movl 12(%esp), %eax
shll $2, %eax
cmpl $0, %eax
sete %al
movzbl %al, %eax
ret
instead of:
test2:
movl 4(%esp), %eax
movl 12(%esp), %ecx
leal (%eax,%ecx,4), %ecx
cmpl %eax, %ecx
sete %al
movzbl %al, %eax
ret
ICC is producing worse code:
test2:
movl 4(%esp), %eax #8.5
movl 12(%esp), %edx #8.5
lea (%edx,%edx), %ecx #9.9
addl %ecx, %ecx #9.9
addl %eax, %ecx #9.9
cmpl %eax, %ecx #9.16
movl $0, %eax #9.16
sete %al #9.16
ret #9.16
as is GCC (looks like our old code):
test2:
movl 4(%esp), %edx
movl 12(%esp), %eax
leal (%edx,%eax,4), %ecx
cmpl %edx, %ecx
sete %al
movzbl %al, %eax
ret
llvm-svn: 19430
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llvm-svn: 19429
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.LBB_Z5test0PdS__3: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $16000, %ecx
sarl $3, %ecx
cmpl %eax, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jg .LBB_Z5test0PdS__3 # no_exit.1
into:
.LBB_Z5test0PdS__3: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__3 # no_exit.1
llvm-svn: 19427
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codegen this loop in stepanov:
no_exit.i: ; preds = %entry, %no_exit.i, %then.i, %_Z5checkd.exit
%i.0.0 = phi int [ 0, %entry ], [ %i.0.0, %no_exit.i ], [ %inc.0, %_Z5checkd.exit ], [ %inc.012, %then.i ] ; <int> [#uses=3]
%indvar = phi uint [ %indvar.next, %no_exit.i ], [ 0, %entry ], [ 0, %then.i ], [ 0, %_Z5checkd.exit ] ; <uint> [#uses=3]
%result_addr.i.0 = phi double [ %tmp.4.i.i, %no_exit.i ], [ 0.000000e+00, %entry ], [ 0.000000e+00, %then.i ], [ 0.000000e+00, %_Z5checkd.exit ] ; <double> [#uses=1]
%first_addr.0.i.2.rec = cast uint %indvar to int ; <int> [#uses=1]
%first_addr.0.i.2 = getelementptr [2000 x double]* %data, int 0, uint %indvar ; <double*> [#uses=1]
%inc.i.rec = add int %first_addr.0.i.2.rec, 1 ; <int> [#uses=1]
%inc.i = getelementptr [2000 x double]* %data, int 0, int %inc.i.rec ; <double*> [#uses=1]
%tmp.3.i.i = load double* %first_addr.0.i.2 ; <double> [#uses=1]
%tmp.4.i.i = add double %result_addr.i.0, %tmp.3.i.i ; <double> [#uses=2]
%tmp.2.i = seteq double* %inc.i, getelementptr ([2000 x double]* %data, int 0, int 2000) ; <bool> [#uses=1]
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=1]
br bool %tmp.2.i, label %_Z10accumulateIPddET0_T_S2_S1_.exit, label %no_exit.i
To this:
.LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i
fldl data(,%eax,8)
fldl 16(%esp)
faddp %st(1)
fstpl 16(%esp)
incl %eax
movl %eax, %ecx
shll $3, %ecx
cmpl $16000, %ecx
#FP_REG_KILL
jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i
instead of this:
.LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i
fldl data(,%eax,8)
fldl 16(%esp)
faddp %st(1)
fstpl 16(%esp)
incl %eax
leal data(,%eax,8), %ecx
leal data+16000, %edx
cmpl %edx, %ecx
#FP_REG_KILL
jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i
llvm-svn: 19425
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llvm-svn: 19423
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llvm-svn: 19422
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list.
llvm-svn: 19421
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loops in stepanov to this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
instead of this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $data, %ecx
movl %ecx, %edx
addl $16000, %edx
subl %ecx, %edx
movl %edx, %ecx
sarl $2, %ecx
shrl $29, %ecx
addl %ecx, %edx
sarl $3, %edx
cmpl %edx, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
The old instruction selector produced:
.LBB_Z5test0PdS__2: # no_exit.1
fldl 24(%esp)
faddl data(,%eax,8)
fstl 24(%esp)
movl %eax, %ecx
incl %ecx
incl %eax
leal data+16000, %edx
movl $data, %edi
subl %edi, %edx
movl %edx, %edi
sarl $2, %edi
shrl $29, %edi
addl %edi, %edx
sarl $3, %edx
cmpl %edx, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2 # no_exit.1
Which is even worse!
llvm-svn: 19419
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llvm-svn: 19369
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llvm-svn: 19365
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llvm-svn: 19361
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llvm-svn: 19360
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llvm-svn: 19359
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llvm-svn: 19353
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llvm-svn: 19345
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llvm-svn: 19327
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llvm-svn: 14622
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