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* Fix sdisel memcpy, memset, memmove lowering:Evan Cheng2010-04-011-85/+133
| | | | | | | | | | | | | 1. Makes it possible to lower with floating point loads and stores. 2. Avoid unaligned loads / stores unless it's fast. 3. Fix some memcpy lowering logic bug related to when to optimize a load from constant string into a constant. 4. Adjust x86 memcpy lowering threshold to make it more sane. 5. Fix x86 target hook so it uses vector and floating point memory ops more effectively. rdar://7774704 llvm-svn: 100090
* Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.Bob Wilson2010-03-301-27/+22
| | | | llvm-svn: 99948
* Added support for address spaces and added a isVolatile field to memcpy, ↵Mon P Wang2010-03-301-22/+27
| | | | | | | | | memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) A update of langref will occur in a subsequent checkin. llvm-svn: 99928
* Funky indentation.Evan Cheng2010-03-301-5/+5
| | | | llvm-svn: 99901
* Pool allocate SDDbgValue nodes.Evan Cheng2010-03-291-0/+21
| | | | llvm-svn: 99836
* Change how dbg_value sdnodes are converted into machine instructions. Their ↵Evan Cheng2010-03-251-20/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers. Here is a theoretical example that illustrates why the placement is important. tmp1 = store tmp1 -> x ... tmp2 = add ... ... call ... store tmp2 -> x Now mem2reg comes along: tmp1 = dbg_value (tmp1 -> x) ... tmp2 = add ... ... call ... dbg_value (tmp2 -> x) When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1. Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers"). This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed. llvm-svn: 99469
* Define placement new wrappers for BumpPtrAllocator andDan Gohman2010-03-181-91/+63
| | | | | | | RecyclingAllocator to allow client code to be simpler, and simplify several clients. llvm-svn: 98847
* SIGN_EXTEND from the same type as the dest is valid.Chris Lattner2010-03-151-1/+1
| | | | llvm-svn: 98548
* sink the call to VT.getSizeInBits() down into its uses,Chris Lattner2010-03-151-7/+5
| | | | | | not all unary nodes necessarily have a simple result type. llvm-svn: 98547
* Rename SDDbgValue.h to SDNodeDbgValue.h for consistency.Evan Cheng2010-03-141-1/+1
| | | | llvm-svn: 98513
* Make default expansion for FP16 <-> FP32 nodes into libcallsAnton Korobeynikov2010-03-141-0/+2
| | | | llvm-svn: 98501
* change the LabelSDNode to be EHLabelSDNode and make it holdChris Lattner2010-03-141-8/+7
| | | | | | | | an MCSymbol. Make the EH_LABEL MachineInstr hold its label with an MCSymbol instead of ID. Fix a bug in MMI.cpp which would return labels named "Label4" instead of "label4". llvm-svn: 98463
* Progress towards shepherding debug info through SelectionDAG.Dale Johannesen2010-03-101-1/+28
| | | | | | | No functional effect yet. This is still evolving and should not be viewed as final. llvm-svn: 98195
* Use Other as a sentinel instead of iAny.Chris Lattner2010-03-071-4/+4
| | | | llvm-svn: 97914
* Fix a typo Duncan noticed.Dan Gohman2010-03-041-1/+1
| | | | llvm-svn: 97735
* Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case whereDan Gohman2010-03-031-4/+45
| | | | | | | | | | CSE and recursive RAUW calls delete a node from the use list, invalidating the use list iterator. There's currently no known way to reproduce this in an unmodified LLVM, however there's no fundamental reason why a SelectionDAG couldn't be formed which would trigger this case. llvm-svn: 97665
* Remove dead parameter passing.Bill Wendling2010-03-021-3/+3
| | | | llvm-svn: 97536
* remove all but one version of SelectionDAG::MorphNodeToChris Lattner2010-03-011-81/+0
| | | | | | (the most general) the others are dead. llvm-svn: 97511
* some trivial microoptimizations.Chris Lattner2010-03-011-6/+8
| | | | llvm-svn: 97441
* enhance the new isel to handle the 'node already exists'Chris Lattner2010-02-281-1/+1
| | | | | | case of MorphNodeTo directly. llvm-svn: 97417
* clean up various VT manipulations, patch by Micah Villmow! PR6337Chris Lattner2010-02-241-9/+6
| | | | llvm-svn: 97072
* convert cycle checker to smallptrset, add comments and make itChris Lattner2010-02-241-20/+20
| | | | | | more elegant. llvm-svn: 97059
* revert david's patch which does not even build.Chris Lattner2010-02-241-4/+4
| | | | llvm-svn: 97057
* Use a SmallPtrSet as suggested by Chris.David Greene2010-02-241-4/+4
| | | | llvm-svn: 97056
* When forming SSE min and max nodes for UGE and ULE comparisons, it'sDan Gohman2010-02-241-0/+23
| | | | | | | | | | | necessary to swap the operands to handle NaN and negative zero properly. Also, reintroduce logic for checking for NaN conditions when forming SSE min and max instructions, fixed to take into consideration NaNs and negative zeros. This allows forming min and max instructions in more cases. llvm-svn: 97025
* add node #'s to debug dumps.Chris Lattner2010-02-241-3/+3
| | | | llvm-svn: 97019
* make selectnodeto set the nodeid to -1. This makes it more akin toChris Lattner2010-02-231-1/+4
| | | | | | creating a new node then replacing uses. llvm-svn: 97000
* Print node ID's in dumps and views if set.Chris Lattner2010-02-231-0/+3
| | | | llvm-svn: 96971
* Speed up cycle checking significantly by caching results.David Greene2010-02-231-3/+9
| | | | llvm-svn: 96956
* Make the non-temporal bit "significant" in MemSDNodes so they aren'tDavid Greene2010-02-171-8/+17
| | | | | | CSE'd or otherwise combined with temporal MemSDNodes. llvm-svn: 96505
* There are two ways of checking for a given type, for example isa<PointerType>(T)Duncan Sands2010-02-161-1/+1
| | | | | | | and T->isPointerTy(). Convert most instances of the first form to the second form. Requested by Chris. llvm-svn: 96344
* Fix a memory leak. Patch by Nicolas Geoffray.Evan Cheng2010-02-151-0/+1
| | | | llvm-svn: 96295
* Add non-temporal flags and remove an assumption of default arguments.David Greene2010-02-151-15/+27
| | | | llvm-svn: 96240
* Only dump output in debug mode.David Greene2010-02-091-4/+5
| | | | llvm-svn: 95711
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-4/+4
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Improve EXTRACT_VECTOR_ELT patch based on comments from DuncanMon P Wang2010-02-011-6/+9
| | | | llvm-svn: 95012
* Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the resultMon P Wang2010-02-011-1/+1
| | | | | | | | type is the same as the element type of the vector. EXTRACT_VECTOR_ELT can be used to extended the width of an integer type. This fixes a bug for Generic/vector-casts.ll on a ppc750. llvm-svn: 94990
* Change the SREM case to match the logic in the IR version ComputeMaskedBits.Duncan Sands2010-01-291-8/+17
| | | | llvm-svn: 94805
* Assign the ordering of SDNodes in a much less intrusive fashion. After theBill Wendling2010-01-281-1/+1
| | | | | | | "visit*" method is called, take the newly created nodes, walk them in a DFS fashion, and if they don't have an ordering set, then give it one. llvm-svn: 94757
* Remove the '-disable-scheduling' flag and replace it with the 'source' option ofBill Wendling2010-01-231-8/+5
| | | | | | | | | the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also, keep track of the SDNode ordering by default. Eventually, we would like to make this ordering a way to break a "tie" in the scheduler. However, doing that now breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux. llvm-svn: 94308
* When XDEBUG is enabled, check for SelectionDAG cycles at some keyDavid Greene2010-01-201-1/+35
| | | | | | | points. This will help us find future problems like the one described in PR6019. llvm-svn: 94019
* Add some asserts to check SelectionDAG problems earlier.David Greene2010-01-201-0/+12
| | | | llvm-svn: 93960
* Add some new debugging APIs to print out "raw" SelectionDAGs to makeDavid Greene2010-01-191-28/+24
| | | | | | understanding CannotYTetSelect and other errors easier. llvm-svn: 93901
* Add some debug routines to SelectionDAG to dump full DAGs.David Greene2010-01-151-0/+43
| | | | | | | | | | | print/dumpWithDepth allows one to dump a DAG up to N levels deep. dump/printWithFullDepth prints the whole DAG, subject to a depth limit on 100 in the default case (to prevent infinite recursion). Have CannotYetSelect to a dumpWithFullDepth so it is clearer exactly what the non-matching DAG looks like. llvm-svn: 93538
* Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNodeDan Gohman2010-01-091-11/+28
| | | | | | | | | | really does need to be a vector type, because TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type, and it needs to be able to distinguish between vectors and scalars. Also, fix some more issues with legalization of vector casts. llvm-svn: 93043
* Teach dag combine to fold the following transformation more aggressively:Evan Cheng2010-01-061-0/+2
| | | | | | | | | | (OP (trunc x), (trunc y)) -> (trunc (OP x, y)) Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel. This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places. llvm-svn: 92849
* Change errs() to dbgs().David Greene2010-01-051-10/+11
| | | | llvm-svn: 92569
* Add more plumbing. This time in the LowerArguments and "get" functions whichBill Wendling2009-12-221-3/+3
| | | | | | | | return partial registers. This affected the back-end lowering code some. Also patch up some places I missed before in the "get" functions. llvm-svn: 91880
* - Add a bit more plumbing assigning an order to SDNodes.Bill Wendling2009-12-211-1/+17
| | | | | | - Modify the "dump" method to emit the order of an SDNode. llvm-svn: 91845
* Place SDNodeOrdering.h in the directory it's used.Bill Wendling2009-12-211-1/+2
| | | | llvm-svn: 91834
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