summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Commit message (Collapse)AuthorAgeFilesLines
* More DebugLoc propagation. This should be everythingDale Johannesen2009-02-021-100/+112
| | | | | | except LegalizeOp itself. llvm-svn: 63560
* DebugLoc propagation. ExpandOp and PromoteOp,Dale Johannesen2009-02-021-307/+330
| | | | | | among others. llvm-svn: 63555
* More DebugLoc propagation.Dale Johannesen2009-02-021-109/+127
| | | | llvm-svn: 63543
* DebugLoc propagation for int<->fp conversions.Dale Johannesen2009-02-021-74/+89
| | | | llvm-svn: 63537
* Fix PR3453 and probably a bunch of other potentialDuncan Sands2009-02-011-4/+6
| | | | | | | | | crashes or wrong code with codegen of large integers: eliminate the legacy getIntegerVTBitMask and getIntegerVTSignBit methods, which returned their value as a uint64_t, so couldn't handle huge types. llvm-svn: 63494
* Fix PR3401: when using large integers, the typeDuncan Sands2009-01-311-26/+19
| | | | | | | | | | | | | returned by getShiftAmountTy may be too small to hold shift values (it is an i8 on x86-32). Before and during type legalization, use a large but legal type for shift amounts: getPointerTy; afterwards use getShiftAmountTy, fixing up any shift amounts with a big type during operation legalization. Thanks to Dan for writing the original patch (which I shamelessly pillaged). llvm-svn: 63482
* Make LowerCallTo and LowerArguments take a DebugLocDale Johannesen2009-01-301-2/+4
| | | | | | argument. Adjust all callers and overloaded versions. llvm-svn: 63444
* Get rid of the non-DebugLoc-ified getNOT() method.Bill Wendling2009-01-301-3/+5
| | | | llvm-svn: 63442
* Explicitly add PseudoSourceValue information when loweringDan Gohman2009-01-291-10/+11
| | | | | | BUILD_VECTOR and conversions to stack operations. llvm-svn: 63333
* Make isOperationLegal do what its name suggests, and introduce aDan Gohman2009-01-281-25/+28
| | | | | | | | | | | | | | | new isOperationLegalOrCustom, which does what isOperationLegal previously did. Update a bunch of callers to use isOperationLegalOrCustom instead of isOperationLegal. In some case it wasn't obvious which behavior is desired; when in doubt I changed then to isOperationLegalOrCustom as that preserves their previous behavior. This is for the second half of PR3376. llvm-svn: 63212
* Use ValueType::bitsLT to simplify some code.Dan Gohman2009-01-281-1/+1
| | | | llvm-svn: 63170
* Use ZERO_EXTEND instead of ANY_EXTEND when promotingDan Gohman2009-01-281-1/+1
| | | | | | | shift amounts, to avoid implicitly assuming that target architectures will ignore the high bits. llvm-svn: 63169
* Add an assertion to the form of SelectionDAG::getConstant that takesDan Gohman2009-01-271-1/+1
| | | | | | | | a uint64_t to verify that the value is in range for the given type, to help catch accidental overflow. Fix a few places that relied on getConstant implicitly truncating the value. llvm-svn: 63128
* Fix an indent and a typo.Nate Begeman2009-01-241-1/+1
| | | | llvm-svn: 62940
* Add SelectionDAG::getNOT method to construct bitwise NOT operations,Bob Wilson2009-01-221-4/+2
| | | | | | | corresponding to the "not" and "vnot" PatFrags. Use the new method in some places where it seems appropriate. llvm-svn: 62768
* CellSPU:Scott Michel2009-01-211-0/+4
| | | | | | | | | | | | | - Ensure that (operation) legalization emits proper FDIV libcall when needed. - Fix various bugs encountered during llvm-spu-gcc build, along with various cleanups. - Start supporting double precision comparisons for remaining libgcc2 build. Discovered interesting DAGCombiner feature, which is currently solved via custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner insists on inserting one anyway.) - Update README. llvm-svn: 62664
* More consts on TargetLowering references.Dan Gohman2009-01-151-1/+1
| | | | llvm-svn: 62262
* Use const with TargetLowering references in a few more places.Dan Gohman2009-01-151-4/+5
| | | | llvm-svn: 62260
* Use DebugInfo interface to lower dbg_* intrinsics.Devang Patel2009-01-131-6/+11
| | | | llvm-svn: 62127
* Rename getABITypeSize to getTypePaddedSize, asDuncan Sands2009-01-121-2/+3
| | | | | | suggested by Chris. llvm-svn: 62099
* Fix PR3274: when promoting the condition of a BRCOND node,Duncan Sands2009-01-011-50/+57
| | | | | | | | | | promote from i1 all the way up to the canonical SetCC type. In order to discover an appropriate type to use, pass MVT::Other to getSetCCResultType. In order to be able to do this, change getSetCCResultType to take a type as an argument, not a value (this is also more logical). llvm-svn: 61542
* Teach LeaglizeDAG that i64 mul can be a libcall.Scott Michel2008-12-291-0/+2
| | | | llvm-svn: 61463
* Clean up the atomic opcodes in SelectionDAG.Dan Gohman2008-12-231-155/+50
| | | | | | | | | | | | | This removes all the _8, _16, _32, and _64 opcodes and replaces each group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode is now used to carry the size information. In tablegen, the size-specific opcodes are replaced by size-independent opcodes that utilize the ability to compose them with predicates. This shrinks the per-opcode tables and makes the code that handles atomics much more concise. llvm-svn: 61389
* Added support for vector widening.Mon P Wang2008-12-181-31/+39
| | | | llvm-svn: 61209
* Fix expansion of vsetcc to set the high bit for true instead of 1.Mon P Wang2008-12-171-4/+6
| | | | llvm-svn: 61129
* Reapply r60997, this time without forgetting thatDuncan Sands2008-12-141-5/+12
| | | | | | | target constants are allowed to have an illegal type. llvm-svn: 61006
* Temporarily revert r60997. It was causing this failure:Bill Wendling2008-12-131-8/+5
| | | | | | | | | | | | | | | | | | | Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ... FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll Failed with exit(1) at line 1 while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738 Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493. 0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98 1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593 2 libSystem.B.dylib 0x96cac09b _sigtramp + 43 3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359 4 libSystem.B.dylib 0x96d24ec2 raise + 26 5 libSystem.B.dylib 0x96d3447f abort + 73 6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101 7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub ... llvm-svn: 61001
* LegalizeDAG is not supposed to introduce illegalDuncan Sands2008-12-131-5/+8
| | | | | | | types into the DAG if they were not already there. Check this with an assertion. llvm-svn: 60997
* Added basic support for expanding VSETCCMon P Wang2008-12-131-2/+21
| | | | llvm-svn: 60974
* On big-endian machines it is wrong to do a fullDuncan Sands2008-12-131-19/+22
| | | | | | | | | | width register load followed by a truncating store for the copy, since the load will not place the value in the lower bits. Probably partial loads/stores can never happen here, but fix it anyway. llvm-svn: 60972
* When expanding unaligned loads and stores do not makeDuncan Sands2008-12-121-34/+123
| | | | | | | | | | | | | | | | | | | | | | | | use of illegal integer types: instead, use a stack slot and copying via integer registers. The existing code is still used if the bitconvert is to a legal integer type. This fires on the PPC testcases 2007-09-08-unaligned.ll and vec_misaligned.ll. It looks like equivalent code is generated with these changes, just permuted, but it's hard to tell. With these changes, nothing in LegalizeDAG produces illegal integer types anymore. This is a prerequisite for removing the LegalizeDAG type legalization code. While there I noticed that the existing code doesn't handle trunc store of f64 to f32: it turns this into an i64 store, which represents a 4 byte stack smash. I added a FIXME about this. Hopefully someone more motivated than I am will take care of it. llvm-svn: 60964
* Fix add/sub expansion: don't create ADD / SUB with two results (seems like ↵Evan Cheng2008-12-121-5/+5
| | | | | | everyone is doing this these days :-). Patch by Daniel M Gessel! llvm-svn: 60958
* When using a 4 byte jump table on a 64 bit machine,Duncan Sands2008-12-121-11/+3
| | | | | | | | do an extending load of the 4 bytes rather than a potentially illegal (type) i32 load followed by a sign extend. llvm-svn: 60945
* Added support for SELECT v8i8 v4i16 for X86 (MMX)Mon P Wang2008-12-121-0/+4
| | | | | | Added support for TRUNC v8i16 to v8i8 for X86 (MMX) llvm-svn: 60916
* Whitespace clean up (tabs with spaces)Mon P Wang2008-12-111-8/+8
| | | | llvm-svn: 60866
* Whitespace changes.Bill Wendling2008-12-101-1/+1
| | | | llvm-svn: 60826
* Add sub/mul overflow intrinsics. This currently doesn't have aBill Wendling2008-12-091-7/+39
| | | | | | | target-independent way of determining overflow on multiplication. It's very tricky. Patch by Zoltan Varga! llvm-svn: 60800
* In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promotingMon P Wang2008-12-091-2/+2
| | | | | | one of its operand. llvm-svn: 60749
* Fix getNode to allow a vector for the shift amount for shifts of vectors.Mon P Wang2008-12-091-7/+29
| | | | | | | | Fix the shift amount when unrolling a vector shift into scalar shifts. Fix problem in getShuffleScalarElt where it assumes that the input of a bit convert must be a vector. llvm-svn: 60740
* Non-functional change: make custom lowering for truncate stylisticallyScott Michel2008-12-021-5/+12
| | | | | | consistent with the way it's generally done in other places. llvm-svn: 60439
* make it possible to custom lower TRUNCATE (needed for the CellSPU target)Tilmann Scheller2008-12-021-0/+5
| | | | llvm-svn: 60409
* Removed some unnecessary code in widening.Mon P Wang2008-12-021-115/+9
| | | | llvm-svn: 60406
* There are no longer any places that require aDuncan Sands2008-12-011-2/+4
| | | | | | | | MERGE_VALUES node with only one operand, so get rid of special code that only existed to handle that possibility. llvm-svn: 60349
* Change the interface to the type legalization methodDuncan Sands2008-12-011-2/+4
| | | | | | | | | | | ReplaceNodeResults: rather than returning a node which must have the same number of results as the original node (which means mucking around with MERGE_VALUES, and which is also easy to get wrong since SelectionDAG folding may mean you don't get the node you expect), return the results in a vector. llvm-svn: 60348
* Removing redundant semicolons. No functionality change.Sanjiv Gupta2008-11-271-2/+2
| | | | llvm-svn: 60149
* Allow custom lowering of ADDE/ADDC/SUBE/SUBC operations.Sanjiv Gupta2008-11-261-6/+36
| | | | llvm-svn: 60102
* A simplification for checking whether the signs of the operands and sum ↵Bill Wendling2008-11-251-15/+14
| | | | | | differ. Thanks, Duncan. llvm-svn: 60043
* Now with the correct type for the 0.Bill Wendling2008-11-251-1/+1
| | | | llvm-svn: 60016
* Get rid of unused variable.Bill Wendling2008-11-251-1/+0
| | | | llvm-svn: 60015
* Hacker's Delight says, "Signed integer overflow of addition occurs if and onlyBill Wendling2008-11-251-4/+48
| | | | | | | if the operands have the same sign and the sum has sign opposite to that of the operands." llvm-svn: 60014
OpenPOWER on IntegriCloud