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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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* The first patch of X86 support for read cycle counterAndrew Lenharth2005-11-201-0/+12
| | | | llvm-svn: 24429
* Silence a bogus warningChris Lattner2005-11-191-3/+2
| | | | llvm-svn: 24420
* Teach LLVM how to scalarize packed types. Currently, this only works onNate Begeman2005-11-191-1/+52
| | | | | | | | | | | | | | | | | | | | | | | packed types with an element count of 1, although more generic support is coming. This allows LLVM to turn the following code: void %foo(<1 x float> * %a) { entry: %tmp1 = load <1 x float> * %a; %tmp2 = add <1 x float> %tmp1, %tmp1 store <1 x float> %tmp2, <1 x float> *%a ret void } Into: _foo: lfs f0, 0(r3) fadds f0, f0, f0 stfs f0, 0(r3) blr llvm-svn: 24416
* Allow targets to custom legalize leaf nodes like GlobalAddress.Chris Lattner2005-11-171-1/+13
| | | | llvm-svn: 24387
* Teach legalize about targetglobaladdressChris Lattner2005-11-171-0/+1
| | | | llvm-svn: 24385
* continued readcyclecounter supportAndrew Lenharth2005-11-111-0/+5
| | | | llvm-svn: 24300
* Switch the allnodes list from a vector of pointers to an ilist of nodes.This ↵Chris Lattner2005-11-091-6/+6
| | | | | | | | eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding nodes to the graph. llvm-svn: 24263
* Handle the trivial (but common) two-op case more efficientlyChris Lattner2005-11-091-11/+18
| | | | llvm-svn: 24259
* Allocate the right amount of memory for this vector up front.Chris Lattner2005-11-081-0/+1
| | | | llvm-svn: 24252
* Allow custom lowered FP_TO_SINT ops in the check for whether a largerNate Begeman2005-10-251-1/+2
| | | | | | | FP_TO_SINT is preferred to a larger FP_TO_UINT. This seems to be begging for a TLI.isOperationCustom() helper function. llvm-svn: 23992
* Teach Legalize how to do something with EXTRACT_ELEMENT when the type ofNate Begeman2005-10-191-7/+30
| | | | | | the pair of elements is a legal type. llvm-svn: 23804
* Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.Nate Begeman2005-10-181-0/+25
| | | | llvm-svn: 23776
* Use getExtLoad here instead of getNode, as extloads produce two values. ThisChris Lattner2005-10-151-2/+3
| | | | | | fixes a legalize failure on SPASS for itanium. llvm-svn: 23747
* Relax the checking on zextload generation a bit, since as sabre pointed outNate Begeman2005-10-141-22/+0
| | | | | | | | | | you could be AND'ing with the result of a shift that shifts out all the bits you care about, in addition to a constant. Also, move over an add/sub_parts fold from legalize to the dag combiner, where it works for things other than constants. Woot! llvm-svn: 23720
* When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chainChris Lattner2005-10-131-2/+28
| | | | | | is also legal. Add support for ExpandOp'ing raw EXTLOADs too. llvm-svn: 23716
* Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to LegalizeChris Lattner2005-10-131-0/+10
| | | | llvm-svn: 23715
* Add support to Legalize for expanding i64 sextload/zextload into hi and loNate Begeman2005-10-131-0/+35
| | | | | | | parts. This should fix the crafty and signed long long unit test failure on x86 last night. llvm-svn: 23711
* Move some Legalize functionality over to the DAGCombiner where it belongs.Nate Begeman2005-10-131-18/+5
| | | | | | Kill some dead code. llvm-svn: 23706
* silence a bogus GCC warningChris Lattner2005-10-061-1/+1
| | | | llvm-svn: 23646
* Make the legalizer completely non-recursiveChris Lattner2005-10-061-28/+63
| | | | llvm-svn: 23642
* Remove some bad code from LegalizeNate Begeman2005-10-051-4/+1
| | | | llvm-svn: 23640
* Fix some faulty logic in the libcall inserter.Nate Begeman2005-10-041-19/+11
| | | | | | | | | | | | | | | | | | | Since calls return more than one value, don't bail if one of their uses happens to be a node that's not an MVT::Other when following the chain from CALLSEQ_START to CALLSEQ_END. Once we've found a CALLSEQ_START, we can just return; there's no need to tail-recurse further up the graph. Most importantly, just because something only has one use doesn't mean we should use it's one use to follow from start to end. This faulty logic caused us to follow a chain of one-use FP operations back to a much earlier call, putting a cycle in the graph from a later start to an earlier end. This is a better fix that reverting to the workaround committed earlier today. llvm-svn: 23620
* Add back a workaround that fixes some breakages from chris's last change.Nate Begeman2005-10-041-2/+13
| | | | | | | Neither of us have yet figured out why this code is necessary, but stuff breaks if its not there. Still tracking this down... llvm-svn: 23617
* Fix a problem where the legalizer would run out of stack space on extremelyChris Lattner2005-10-021-9/+36
| | | | | | | large basic blocks because it was purely recursive. This switches it to an iterative/recursive hybrid. llvm-svn: 23596
* Fix two bugs in my patch earlier today that broke int->fp conversion on X86.Chris Lattner2005-09-291-2/+2
| | | | llvm-svn: 23522
* Add FP versions of the binary operators, keeping the int and fp worlds seperate.Chris Lattner2005-09-281-9/+36
| | | | | | | | Though I have done extensive testing, it is possible that this will break things in configs I can't test. Please let me know if this causes a problem and I'll fix it ASAP. llvm-svn: 23504
* Allow targets to say they don't support truncstore i1 (which includes a maskChris Lattner2005-09-101-2/+15
| | | | | | when storing to an 8-bit memory location), as most don't. llvm-svn: 23303
* Clean up some code from the last checkinChris Lattner2005-09-021-24/+12
| | | | llvm-svn: 23229
* Fix a bug in legalize where it would emit two calls to libcalls that returnChris Lattner2005-09-021-10/+13
| | | | | | | | i64 values on targets that need that expanded to 32-bit registers. This fixes PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from taking 122.72s to 81.96s on my desktop. llvm-svn: 23228
* Make sure to legalize assert[zs]ext's operand correctlyChris Lattner2005-09-021-2/+7
| | | | llvm-svn: 23208
* legalize ANY_EXTEND appropriatelyChris Lattner2005-09-021-6/+26
| | | | llvm-svn: 23204
* Allow targets to custom expand shifts that are too large for their registersChris Lattner2005-08-311-0/+39
| | | | llvm-svn: 23173
* Fix FreeBench/fourinarow with the dag isel, by not adding a bogus resultChris Lattner2005-08-301-4/+1
| | | | | | to SHIFT_PARTS nodes llvm-svn: 23151
* Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,Chris Lattner2005-08-301-1/+4
| | | | | | at least tends to expose problems elsewhere. llvm-svn: 23149
* Add support for AssertSext and AssertZext, folding other extensions withNate Begeman2005-08-301-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | them. This allows for elminination of redundant extends in the entry blocks of functions on PowerPC. Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs to ISD::MUL in ExpandOp are actually just extended i32 values and not real i64 values. this allows us to codegen int mulhs(int a, int b) { return ((long long)a * b) >> 32; } as: _mulhs: mulhw r3, r4, r3 blr instead of: _mulhs: mulhwu r2, r4, r3 srawi r5, r3, 31 mullw r5, r4, r5 add r2, r2, r5 srawi r4, r4, 31 mullw r3, r4, r3 add r3, r2, r3 blr with a similar improvement on x86. llvm-svn: 23147
* Some of us cared about the the promote pathAndrew Lenharth2005-08-291-0/+4
| | | | llvm-svn: 23130
* Fix an infinite loop on x86Chris Lattner2005-08-291-1/+1
| | | | llvm-svn: 23129
* Nate noticed that Andrew never did this. This fixes PR600Chris Lattner2005-08-261-1/+1
| | | | llvm-svn: 23110
* Change ConstantPoolSDNode to actually hold the Constant itself instead ofChris Lattner2005-08-261-11/+3
| | | | | | | | putting it into the constant pool. This allows the isel machinery to create constants that it will end up deciding are not needed, without them ending up in the resultant function constant pool. llvm-svn: 23081
* the 5th operand is the 4th numberChris Lattner2005-08-261-1/+1
| | | | llvm-svn: 23074
* Add support for targets that want to custom expand select_cc in some cases.Chris Lattner2005-08-261-6/+24
| | | | llvm-svn: 23071
* Allow LowerOperation to return a null SDOperand in case it wants to lowerChris Lattner2005-08-261-21/+39
| | | | | | some things given to it, but not all. llvm-svn: 23070
* Start using isOperationLegal and isTypeLegal to simplify the codeChris Lattner2005-08-241-28/+23
| | | | llvm-svn: 23012
* Teach Legalize how to turn setcc into select_ccNate Begeman2005-08-231-18/+31
| | | | llvm-svn: 22977
* When legalizing brcond ->brcc or select -> selectcc, make sure to truncateChris Lattner2005-08-211-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the old condition to a one bit value. The incoming value must have been promoted, and the top bits are undefined. This causes us to generate: _test: rlwinm r2, r3, 0, 31, 31 li r3, 17 cmpwi cr0, r2, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r3, 1 .LBB_test_2: ; blr instead of: _test: rlwinm r2, r3, 0, 31, 31 li r2, 17 cmpwi cr0, r3, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r2, 1 .LBB_test_2: ; or r3, r2, r2 blr for: int %test(bool %c) { %retval = select bool %c, int 17, int 1 ret int %retval } llvm-svn: 22947
* Culling out use of unions for converting FP to bits and vice versa.Jim Laskey2005-08-171-12/+6
| | | | llvm-svn: 22838
* Switched to using BitsToDouble for int_to_float to avoid aliasing problem.Jim Laskey2005-08-171-4/+4
| | | | llvm-svn: 22831
* Change hex float constants for the sake of VC++.Jim Laskey2005-08-171-1/+4
| | | | llvm-svn: 22828
* Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in theJim Laskey2005-08-171-11/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | legalizer. PowerPC now uses this expansion instead of ISel version. Example: // signed integer to double conversion double f1(signed x) { return (double)x; } // unsigned integer to double conversion double f2(unsigned x) { return (double)x; } // signed integer to float conversion float f3(signed x) { return (float)x; } // unsigned integer to float conversion float f4(unsigned x) { return (float)x; } Byte Code: internal fastcc double %_Z2f1i(int %x) { entry: %tmp.1 = cast int %x to double ; <double> [#uses=1] ret double %tmp.1 } internal fastcc double %_Z2f2j(uint %x) { entry: %tmp.1 = cast uint %x to double ; <double> [#uses=1] ret double %tmp.1 } internal fastcc float %_Z2f3i(int %x) { entry: %tmp.1 = cast int %x to float ; <float> [#uses=1] ret float %tmp.1 } internal fastcc float %_Z2f4j(uint %x) { entry: %tmp.1 = cast uint %x to float ; <float> [#uses=1] ret float %tmp.1 } internal fastcc double %_Z2g1i(int %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.2 = cast int %x to uint ; <uint> [#uses=1] %tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1] %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %tmp.3, uint* %tmp.5 %tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.10 = load double* %tmp.9 ; <double> [#uses=1] %tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1] %tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1] ret double %tmp.14 } internal fastcc double %_Z2g2j(uint %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %x, uint* %tmp.1 %tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.5 = load double* %tmp.4 ; <double> [#uses=1] %tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1] %tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1] ret double %tmp.9 } internal fastcc float %_Z2g3i(int %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.2 = cast int %x to uint ; <uint> [#uses=1] %tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1] %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %tmp.3, uint* %tmp.5 %tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.10 = load double* %tmp.9 ; <double> [#uses=1] %tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1] %tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1] %tmp.16 = cast double %tmp.14 to float ; <float> [#uses=1] ret float %tmp.16 } internal fastcc float %_Z2g4j(uint %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %x, uint* %tmp.1 %tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.5 = load double* %tmp.4 ; <double> [#uses=1] %tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1] %tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1] %tmp.11 = cast double %tmp.9 to float ; <float> [#uses=1] ret float %tmp.11 } PowerPC Code: .machine ppc970 .const .align 2 .CPIl1__Z2f1i_0: ; float 0x4330000080000000 .long 1501560836 ; float 4.5036e+15 .text .align 2 .globl l1__Z2f1i l1__Z2f1i: .LBBl1__Z2f1i_0: ; entry xoris r2, r3, 32768 stw r2, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl1__Z2f1i_0) lfs f1, lo16(.CPIl1__Z2f1i_0)(r2) fsub f1, f0, f1 blr .const .align 2 .CPIl2__Z2f2j_0: ; float 0x4330000000000000 .long 1501560832 ; float 4.5036e+15 .text .align 2 .globl l2__Z2f2j l2__Z2f2j: .LBBl2__Z2f2j_0: ; entry stw r3, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl2__Z2f2j_0) lfs f1, lo16(.CPIl2__Z2f2j_0)(r2) fsub f1, f0, f1 blr .const .align 2 .CPIl3__Z2f3i_0: ; float 0x4330000080000000 .long 1501560836 ; float 4.5036e+15 .text .align 2 .globl l3__Z2f3i l3__Z2f3i: .LBBl3__Z2f3i_0: ; entry xoris r2, r3, 32768 stw r2, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl3__Z2f3i_0) lfs f1, lo16(.CPIl3__Z2f3i_0)(r2) fsub f0, f0, f1 frsp f1, f0 blr .const .align 2 .CPIl4__Z2f4j_0: ; float 0x4330000000000000 .long 1501560832 ; float 4.5036e+15 .text .align 2 .globl l4__Z2f4j l4__Z2f4j: .LBBl4__Z2f4j_0: ; entry stw r3, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl4__Z2f4j_0) lfs f1, lo16(.CPIl4__Z2f4j_0)(r2) fsub f0, f0, f1 frsp f1, f0 blr llvm-svn: 22814
* Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)Chris Lattner2005-08-161-46/+17
| | | | | | | | | | | | | | used to tack a register number onto the node. Instead of doing this, make a new node, RegisterSDNode, which is a leaf containing a register number. These three operations just become normal DAG nodes now, instead of requiring special handling. Note that with this change, it is no longer correct to make illegal CopyFromReg/CopyToReg nodes. The legalizer will not touch them, and this is bad, so don't do it. :) llvm-svn: 22806
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