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path: root/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
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* Tabs, formatting and long lines oh my!Eric Christopher2012-02-241-4/+6
| | | | llvm-svn: 151334
* More newline cleanups.Eric Christopher2012-02-231-1/+1
| | | | llvm-svn: 151235
* Properly emit _fltused with FastISel. Refactor to share code with SDAG.Michael J. Spencer2012-02-221-0/+25
| | | | | | Patch by Joe Groff! llvm-svn: 151183
* Remove the eh.exception and eh.selector intrinsics. Also remove a hack to copyBill Wendling2012-01-311-28/+0
| | | | | | | over the catch information. The catch information is now tacked to the invoke instruction. llvm-svn: 149326
* An array of chars of length 8 will also cause the stack protector to be insertedBill Wendling2011-11-021-1/+1
| | | | | | | | into the function. Reflect that here so that the array will be placed next to the SP. <rdar://problem/10128329> llvm-svn: 143590
* Directly point debug info to the stack slot of the arugment, instead of ↵Devang Patel2011-09-081-6/+4
| | | | | | trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. llvm-svn: 139330
* Add the support in code-gen for the landingpad instruction lowering.Bill Wendling2011-08-171-0/+31
| | | | | | | | | | The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION SDNodes. The information from the landingpad instruction is harvested by the 'AddLandingPadInfo' function. The new EH uses the current EH scheme in the back-end. This will change once we switch over to the new scheme. (Reviewed by Jakob!) llvm-svn: 137880
* Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,Bill Wendling2011-07-301-34/+0
| | | | | | | r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444, r136445, r136446, r136253 pending review. llvm-svn: 136556
* Add the AddLandingPadInfo function.Bill Wendling2011-07-281-0/+34
| | | | | | | AddLandingPadInfo takes a landingpad instruction and grabs all of the information from it that it needs for EH table generation. llvm-svn: 136429
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-3/+3
| | | | llvm-svn: 135375
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-5/+6
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Make codegen able to handle values of empty types. This is one wayRafael Espindola2011-05-131-0/+4
| | | | | | to fix PR9900. I will keep it open until sable is able to comment on it. llvm-svn: 131294
* Avoid extra vreg copies for arguments passed in registers. Specifically, ↵Eli Friedman2011-05-051-26/+0
| | | | | | this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 . llvm-svn: 130928
* There are times when the landing pad won't have a call to 'eh.selector' inBill Wendling2011-03-031-9/+23
| | | | | | | | | | | | | | it. It's been assumed up til now that it would be in its immediate successor. However, this isn't necessarily the case. It could be in one of its successor's successors. Modify the code to more thoroughly check for an 'eh.selector' call in successors. It only looks at a successor if we get there as a result of an unconditional branch. Testcase ObjC/exceptions-4.m in r126968. llvm-svn: 126969
* Set NumSignBits to 1 if KnownZero/KnownOne are being zero extended. In theory itCameron Zwarich2011-02-251-0/+1
| | | | | | | | is possible to do better if the high bit is set in either KnownZero/KnownOne, but in practice NumSignBits is always 1 when we are zero extending because nothing is known about that register. llvm-svn: 126465
* We only want to zero extend the existing information if the bit width isCameron Zwarich2011-02-251-1/+1
| | | | | | actually larger. llvm-svn: 126464
* Merge information about the number of zero, one, and sign bits of live-outCameron Zwarich2011-02-241-0/+116
| | | | | | | registers at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine phase. This fixes <rdar://problem/8760114>. llvm-svn: 126380
* Track blocks visited in reverse postorder.Cameron Zwarich2011-02-241-0/+1
| | | | llvm-svn: 126377
* Roll out r126169 and r126170 in an attempt to fix the selfhost bot.Cameron Zwarich2011-02-221-7/+1
| | | | llvm-svn: 126185
* Merge information about the number of zero, one, and sign bits of live-out ↵Cameron Zwarich2011-02-221-1/+7
| | | | | | | | | registers at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine phase. This fixes <rdar://problem/8760114>. llvm-svn: 126170
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-1/+0
| | | | | | and fixes here and there. llvm-svn: 123170
* Reapply r112623. Included additional check for unused byval argument.Devang Patel2010-08-311-0/+23
| | | | llvm-svn: 112659
* Revert r112623. It is causing self host build failures.Devang Patel2010-08-311-23/+0
| | | | llvm-svn: 112631
* Remember byval argument's frame index during argument lowering and use this ↵Devang Patel2010-08-311-0/+23
| | | | | | | | info to emit debug info. Fixes Radar 8367011. llvm-svn: 112623
* It's better to have the arrays, which would trigger the creation of stackBill Wendling2010-07-271-1/+9
| | | | | | | | | protectors, to be near the stack protectors on the stack. Accomplish this by tagging the stack object with a predicate that indicates that it would trigger this. In the prolog-epilog inserter, assign these objects to the stack after the stack protector but before the other objects. llvm-svn: 109481
* Revert r108369, sorting llvm.dbg.declare information by source position,Dan Gohman2010-07-161-1/+33
| | | | | | | | | | | | | since it doesn't work for front-ends which don't emit column information (which includes llvm-gcc in its present configuration), and doesn't work for clang for K&R style variables where the variables are declared in a different order from the parameter list. Instead, make a separate pass through the instructions to collect the llvm.dbg.declare instructions in order. This ensures that the debug information for variables is emitted in this order. llvm-svn: 108538
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-0/+8
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h llvm-svn: 107987
* cache result of operator*Gabor Greif2010-07-091-4/+8
| | | | llvm-svn: 107980
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-0/+8
| | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. llvm-svn: 107943
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-7/+0
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-0/+7
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-071-1/+1
| | | | | | allow target-specific fast-isel code to make use of it directly. llvm-svn: 107787
* Rename CreateReg to CreateRegs, and MakeReg to CreateReg.Dan Gohman2010-07-021-4/+5
| | | | llvm-svn: 107451
* Rename CreateRegForValue to CreateReg, and change its argumentDan Gohman2010-07-011-5/+5
| | | | | | | from a Value to a Type, because it doesn't actually care about the Value. llvm-svn: 107383
* use ArgOperand APIGabor Greif2010-06-301-10/+10
| | | | llvm-svn: 107282
* use ArgOperand APIGabor Greif2010-06-251-1/+1
| | | | llvm-svn: 106828
* prune an includeGabor Greif2010-06-251-1/+0
| | | | llvm-svn: 106827
* SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValueDan Gohman2010-05-291-2/+1
| | | | | | | shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set doesn't needs its EnableFastISel argument. llvm-svn: 105101
* Remove the code for special-casing byval for fast-isel. SelectionDAGDan Gohman2010-05-011-3/+1
| | | | | | | handles argument lowering anyway, so there's no need for special casing here. llvm-svn: 102828
* Replace r102368 with code that's less fragile. This creates DBG_VALUE ↵Evan Cheng2010-04-281-0/+1
| | | | | | instructions for function arguments early and insert them after instruction selection is done. llvm-svn: 102554
* Move several SelectionDAG-independent utility functions out of theDan Gohman2010-04-211-261/+1
| | | | | | SelectionDAG directory and into a new Analysis.cpp file. llvm-svn: 101975
* Sink this use_empty() check into isUsedOutsideOfDefiningBlock.Dan Gohman2010-04-201-1/+2
| | | | llvm-svn: 101902
* If a PHI node somehow has debug info, propogate it to the MachineInstr PHI.Dan Gohman2010-04-201-1/+1
| | | | llvm-svn: 101901
* Don't iterate through the whole block just to find the PHI nodes.Dan Gohman2010-04-201-6/+3
| | | | llvm-svn: 101900
* Move isInTailCallPosition out of SelectionDAGBuilder, as it isn'tDan Gohman2010-04-191-0/+85
| | | | | | SelectionDAG-specific. llvm-svn: 101801
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-1/+1
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Revert 101465, it broke internal OpenGL testing.Eric Christopher2010-04-161-6/+7
| | | | | | | Probably the best way to know that all getOperand() calls have been handled is to replace that API instead of updating. llvm-svn: 101579
* reapply r101434Gabor Greif2010-04-161-7/+6
| | | | | | | | | | | | | with a fix for self-hosting rotate CallInst operands, i.e. move callee to the back of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101465
* back out r101423 and r101397, they break llvm-gcc self-host on darwin10Gabor Greif2010-04-161-6/+7
| | | | llvm-svn: 101434
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