| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 146327
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rdar://10530851
llvm-svn: 146276
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attempt.
llvm-svn: 145425
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llvm-svn: 145267
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ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD. Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to
coalesce ADDs.
rdar://10412592
llvm-svn: 144886
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target-independent selector or the target-specific selector.
llvm-svn: 144833
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%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134
Prior to this commit, the GEP instruction that defines %arrayidx136 thought that
%arrayidx135 was a trivial kill. The GEP that defines %arrayidx135 doesn't
generate any code and thus %M0 gets folded into the second GEP. Thus, we need
to look through GEPs with all zero indices.
rdar://10443319
llvm-svn: 144730
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intended, but only by accident.
llvm-svn: 141779
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trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.
llvm-svn: 139330
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and its use.
llvm-svn: 137993
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llvm-svn: 135454
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ambiguity
errors like the one corrected by r135261. Migrate all LLVM callers of the old
constructor to the new one.
llvm-svn: 135431
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at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
[take 2]
llvm-svn: 135423
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llvm-svn: 135375
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llvm-svn: 135040
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llvm-svn: 134116
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sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
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at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
llvm-svn: 133953
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llvm-svn: 133821
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llvm-svn: 132676
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simpler and more consistent.
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
llvm-svn: 132099
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llvm-svn: 131420
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llvm-svn: 131419
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clang generates for cases like this, but it should become more useful soon.
llvm-svn: 131417
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intrinsic from the x86 code to the generic code.
llvm-svn: 131332
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llvm-svn: 130934
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FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
llvm-svn: 130560
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llvm-svn: 130360
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common. rdar://problem/9303592 .
llvm-svn: 130338
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llvm-svn: 130337
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llvm-svn: 130205
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llvm-svn: 130033
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generated
en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x
and shrinks the generated .s file by 5%
llvm-svn: 129755
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this fixes a few rejects on c++ iterator loops.
llvm-svn: 129694
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llvm-svn: 129693
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2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the
shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
instead of FastEmit_ri to simplify code.
llvm-svn: 129666
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allowing us to fold the immediate into the 'and' in this case:
int test1(int i) {
return 8&i;
}
llvm-svn: 129653
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Luis Felipe Strano Moraes!
llvm-svn: 129558
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llvm-svn: 129271
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llvm-svn: 127496
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message instead of creating DBG_VALUE for undefined value in reg0.
llvm-svn: 121059
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llvm-svn: 119990
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Otherwise let getRegForValue() find register for this argument.
llvm-svn: 113843
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llvm-svn: 113614
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llvm-svn: 111223
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llvm-svn: 109103
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update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
llvm-svn: 108765
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since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
llvm-svn: 108538
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llvm-svn: 108364
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it can look past points where a debugger might modify user variables.
llvm-svn: 108336
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