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* Fix a FIXME by moving the fast-isel implementation of the objectsize ↵Eli Friedman2011-05-141-0/+10
| | | | | | intrinsic from the x86 code to the generic code. llvm-svn: 131332
* Allow FastISel of three-register-operand instructions.Owen Anderson2011-05-051-0/+24
| | | | llvm-svn: 130934
* Make FastEmit_ri_ try a bit harder to succeed for supported operations; ↵Eli Friedman2011-04-291-2/+7
| | | | | | FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. llvm-svn: 130560
* Fix a silly mistake in r130338.Eli Friedman2011-04-281-1/+1
| | | | llvm-svn: 130360
* Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is ↵Eli Friedman2011-04-271-2/+6
| | | | | | common. rdar://problem/9303592 . llvm-svn: 130338
* Remove unused function.Eli Friedman2011-04-271-47/+0
| | | | llvm-svn: 130337
* Fast-isel support for simple inline asms.Dan Gohman2011-04-261-10/+31
| | | | llvm-svn: 130205
* Teach FastISel to deal with instructions that have two immediate operands.Owen Anderson2011-04-221-10/+27
| | | | llvm-svn: 130033
* Implement support for x86 fastisel of small fixed-sized memcpys, which are ↵Chris Lattner2011-04-191-52/+44
| | | | | | | | | generated en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x and shrinks the generated .s file by 5% llvm-svn: 129755
* while we're at it, handle 'sdiv exact' of a power of 2 also,Chris Lattner2011-04-181-0/+8
| | | | | | this fixes a few rejects on c++ iterator loops. llvm-svn: 129694
* fix rdar://9297011 - udiv by power of two causing fast-isel rejectsChris Lattner2011-04-181-0/+4
| | | | llvm-svn: 129693
* 1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.llChris Lattner2011-04-171-18/+30
| | | | | | | | | | 2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts 3. teach tblgen to handle shift immediates that are different sizes than the shifted operands, eliminating some code from the X86 fast isel backend. 4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function instead of FastEmit_ri to simplify code. llvm-svn: 129666
* fix rdar://9289583 - fast isel should handle non-canonical commutative binopsChris Lattner2011-04-171-4/+23
| | | | | | | | | | allowing us to fold the immediate into the 'and' in this case: int test1(int i) { return 8&i; } llvm-svn: 129653
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Don't include Operator.h from InstrTypes.h.Jay Foad2011-04-111-0/+1
| | | | llvm-svn: 129271
* Teach FastISel to support register-immediate-immediate instructions.Owen Anderson2011-03-111-0/+23
| | | | llvm-svn: 127496
* If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG ↵Devang Patel2010-12-061-4/+2
| | | | | | message instead of creating DBG_VALUE for undefined value in reg0. llvm-svn: 121059
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-231-27/+27
| | | | llvm-svn: 119990
* Use frame index, if available for byval argument while lowering dbg_declare. ↵Devang Patel2010-09-141-16/+20
| | | | | | Otherwise let getRegForValue() find register for this argument. llvm-svn: 113843
* Add DEBUG message.Devang Patel2010-09-101-2/+10
| | | | llvm-svn: 113614
* Fix typo.Eric Christopher2010-08-171-1/+1
| | | | llvm-svn: 111223
* mass elimination of reliance on automatic iterator dereferencingGabor Greif2010-07-221-1/+1
| | | | llvm-svn: 109103
* After a custom inserter, in a block which has constant instructions,Dan Gohman2010-07-191-0/+1
| | | | | | | update the current basic block in addition to the current insert position, so that they remain consistent. This fixes rdar://8204072. llvm-svn: 108765
* Revert r108369, sorting llvm.dbg.declare information by source position,Dan Gohman2010-07-161-11/+1
| | | | | | | | | | | | | since it doesn't work for front-ends which don't emit column information (which includes llvm-gcc in its present configuration), and doesn't work for clang for K&R style variables where the variables are declared in a different order from the parameter list. Instead, make a separate pass through the instructions to collect the llvm.dbg.declare instructions in order. This ensures that the debug information for variables is emitted in this order. llvm-svn: 108538
* Properly restore DebugLoc after leaving the local constant area.Dan Gohman2010-07-141-1/+2
| | | | llvm-svn: 108364
* Delete fast-isel's trivial load optimization; it breaks debugging becauseDan Gohman2010-07-141-31/+0
| | | | | | it can look past points where a debugger might modify user variables. llvm-svn: 108336
* Don't propagate debug locations to instructions for materializingDan Gohman2010-07-141-5/+8
| | | | | | | constants, since they may not be emited near the other instructions which get the same line, and this confuses debug info. llvm-svn: 108302
* Use COPY for fast-isel bitconvert, but don't create cross-class copies.Jakob Stoklund Olesen2010-07-111-7/+6
| | | | | | This doesn't change the behavior of SelectBitcast for X86. llvm-svn: 108073
* Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.Jakob Stoklund Olesen2010-07-111-30/+12
| | | | | | | This assumes that the registers can be copied which is probably a safe assumption. llvm-svn: 108070
* Use COPY in FastISel everywhere it is safe and trivial.Jakob Stoklund Olesen2010-07-111-8/+4
| | | | | | | The remaining copyRegToReg calls actually check the return value (shock!), so we cannot trivially replace them with COPY instructions. llvm-svn: 108069
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-69/+150
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-150/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h llvm-svn: 107987
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-69/+150
| | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. llvm-svn: 107943
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-081-17/+4
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. llvm-svn: 107879
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-106/+66
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* Don't forward-declare registers for static allocas, which we'llDan Gohman2010-07-071-1/+3
| | | | | | | prefer to materialize as local constants. This fixes the clang bootstrap abort. llvm-svn: 107840
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-11/+32
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-071-56/+73
| | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. llvm-svn: 107791
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-071-40/+26
| | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. llvm-svn: 107789
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-071-1/+1
| | | | | | allow target-specific fast-isel code to make use of it directly. llvm-svn: 107787
* Rename CreateReg to CreateRegs, and MakeReg to CreateReg.Dan Gohman2010-07-021-1/+1
| | | | llvm-svn: 107451
* Rename CreateRegForValue to CreateReg, and change its argumentDan Gohman2010-07-011-1/+1
| | | | | | | from a Value to a Type, because it doesn't actually care about the Value. llvm-svn: 107383
* Teach fast-isel to avoid loading a value from memory when it's alreadyDan Gohman2010-07-011-0/+24
| | | | | | | available in a register. This is pretty primitive, but it reduces the number of instructions in common testcases by 4%. llvm-svn: 107380
* Enable on-demand fast-isel.Dan Gohman2010-07-011-1/+4
| | | | llvm-svn: 107377
* Do one lookup instead of two.Dan Gohman2010-06-211-2/+3
| | | | llvm-svn: 106415
* Generalize this to look in the regular ValueMap in addition toDan Gohman2010-06-211-1/+1
| | | | | | | the LocalValueMap, to make it more flexible when fast-isel isn't proceding straight top-down. llvm-svn: 106414
* Teach regular and fast isel to set dead flags on unused implicit defsDan Gohman2010-06-181-0/+1
| | | | | | on calls and similar instructions. llvm-svn: 106353
* Eliminate unnecessary uses of getZExtValue().Dan Gohman2010-06-181-1/+1
| | | | llvm-svn: 106279
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-3/+3
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* Do one map lookup instead of two.Dan Gohman2010-05-251-2/+3
| | | | llvm-svn: 104645
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