summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Remove the optimizations that convert BRCOND and BR_CC intoDan Gohman2009-11-171-17/+12
| | | | | | | | | | unconditional branches or fallthroghes. Instcombine/SimplifyCFG should be simplifying branches with known conditions. This fixes some problems caused by these transformations not updating the MachineBasicBlock CFG. llvm-svn: 89017
* Remove an unneeded #include.Dan Gohman2009-11-091-1/+0
| | | | llvm-svn: 86601
* When discarding SrcValue information, discard all of it so that codeDan Gohman2009-10-311-7/+5
| | | | | | that uses this information knows to behave conservatively. llvm-svn: 85654
* Don't call SDNode::isPredecessorOf when it isn't necessary. If the load'sDan Gohman2009-10-281-6/+10
| | | | | | chains have no users, they can't be predecessors of the condition. llvm-svn: 85394
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | VISIBILITY_HIDDEN removal. llvm-svn: 85043
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-3/+2
| | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
* Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)Anton Korobeynikov2009-10-201-4/+6
| | | | | | transform. llvm-svn: 84683
* More heuristics for Combiner-AA. Still catches all important cases, butNate Begeman2009-10-121-6/+19
| | | | | | | compile time penalty on gnugo, the worst case in MultiSource, is down to about 2.5% from 30% llvm-svn: 83824
* Fix combiner-aa issue with bases which are different, but can alias.Nate Begeman2009-09-251-14/+34
| | | | | | | Previously, it treated GV+28 GV+0 as different bases, and assumed they could not alias. llvm-svn: 82753
* Use getStoreSize() instead of getStoreSizeInBits()/8.Dan Gohman2009-09-231-2/+2
| | | | llvm-svn: 82656
* Rename several variables from EVT to more descriptive names, now that EVTDan Gohman2009-09-231-20/+20
| | | | | | | is also the name of their type, as declarations like "EVT EVT" look really odd. llvm-svn: 82654
* Substantially speed up combiner-aa in the following ways:Nate Begeman2009-09-151-33/+69
| | | | | | | | | | | | | | 1. Switch from an std::set to a SmallPtrSet for visited chain nodes. 2. Do not force the recursive flattening of token factor nodes, regardless of use count. 3. Immediately process newly created TokenFactor nodes. Also, improve combiner-aa by teaching it that loads to non-overlapping offsets of relatively aligned objects cannot alias. These changes result in a >5x speedup for combiner-aa on most testcases. llvm-svn: 81816
* Don't swap the operands of a subtraction when trying to create aBob Wilson2009-09-101-1/+1
| | | | | | post-decrement load/store. llvm-svn: 81464
* Remove some unused variables and methods warned about byDuncan Sands2009-09-061-3/+0
| | | | | | icc (#177, partial). Patch by Erick Tryzelaar. llvm-svn: 81106
* remove a few DOUTs here and there.Chris Lattner2009-08-231-22/+37
| | | | llvm-svn: 79832
* Add check for completeness. Note that this doesn't actually have any Eli Friedman2009-08-231-1/+1
| | | | | | effect with the way the current code is structured. llvm-svn: 79792
* PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.Eli Friedman2009-08-191-1/+2
| | | | llvm-svn: 79415
* Add contexts to some of the MVT APIs. No functionality change yet, just the ↵Owen Anderson2009-08-121-16/+17
| | | | | | infrastructure work needed to get the contexts to where they need to be first. llvm-svn: 78759
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ↵Owen Anderson2009-08-111-62/+62
| | | | | | | | while the latter is capable of representing either a primitive or an extended type. llvm-svn: 78713
* Fix a bug in the DAGCombiner's handling of multiple linkedDan Gohman2009-08-101-3/+8
| | | | | | | | | | | MERGE_VALUES nodes. Replacing the result values with the operands in one MERGE_VALUES node may cause another MERGE_VALUES node be CSE'd with the first one, and bring its uses along, so that the first one isn't dead, as this code expects. Fix this by iterating until the node is really dead. This fixes PR4699. llvm-svn: 78619
* Fix a bug where DAGCombine was producing an illegal ConstantFPDan Gohman2009-08-101-1/+12
| | | | | | | node after legalize, and remove the workaround code from the ARM backend. llvm-svn: 78615
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ↵Owen Anderson2009-08-101-195/+195
| | | | | | own struct type. llvm-svn: 78610
* Make this comment more closely reflect the code.Dan Gohman2009-08-101-1/+1
| | | | llvm-svn: 78569
* Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().Jakob Stoklund Olesen2009-08-081-1/+3
| | | | | | | | Blackfin supports and/or/xor on i32 but not on i16. Teach DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes after legalize ops. llvm-svn: 78497
* Fix a few places in DAGCombiner that were creating all-ones-bitsDan Gohman2009-08-061-5/+17
| | | | | | | | and high-bits values in ways that weren't correct for integer types wider than 64 bits. This fixes a miscompile in PPMacroExpansion.cpp in clang on x86-64. llvm-svn: 78295
* Avoid forming a SELECT_CC in a type that the target doesn'tDan Gohman2009-08-021-1/+2
| | | | | | | | | | | | | | | | | | | support. This isn't immediately interesting, because Legalize ends up lowering SELECT_CC if the target doesn't support it, but this simplifies the process. Also, if the SELECT_CC would be expanded in Legalize, it can potentially end up with two copies of the condition expression. By leaving it as SELECT+SETCC, the SELECT can be expanded into two SELECTs that use a single SETCC. The two comparisons are usually CSE'd, but depending on when various expressions get legalized, the comparison expression could involve calls to library functions, such that the comparison expression may not be able to be CSE'd. This will be needed by a future patch. llvm-svn: 77896
* Move types back to the 2.5 API.Owen Anderson2009-07-291-9/+6
| | | | llvm-svn: 77516
* Change ConstantArray to 2.5 API.Owen Anderson2009-07-281-1/+1
| | | | llvm-svn: 77347
* Add support for promoting SETCC operations.Jakob Stoklund Olesen2009-07-241-2/+2
| | | | llvm-svn: 76987
* Fix a dagga combiner bug: avoid creating illegal constant.Evan Cheng2009-07-211-9/+12
| | | | | | | | Is this really a winning transformation? fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or (srl (and x, (shl -1, c1)), (sub c1, c2)) llvm-svn: 76535
* Move a few more convenience factory functions from Constant to LLVMContext.Owen Anderson2009-07-151-1/+3
| | | | llvm-svn: 75840
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-4/+4
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-3/+3
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Convert more assert(0)+abort() -> LLVM_UNREACHABLE,Torok Edwin2009-07-111-2/+2
| | | | | | and abort()/exit() -> llvm_report_error(). llvm-svn: 75363
* Thread LLVMContext through MVT and related parts of SDISel.Owen Anderson2009-07-091-5/+7
| | | | llvm-svn: 75153
* dag combine sext(setcc) -> vsetcc before legalize. To make this safe,Chris Lattner2009-07-081-1/+19
| | | | | | | | | VSETCC must define all bits, which is different than it was documented to before. Since all targets that implement VSETCC already have this behavior, and we don't optimize based on this, just change the documentation. We now get nice code for vec_compare.ll llvm-svn: 74978
* Adapt the x86 build_vector dagcombine to the current state of the legalizer.Nate Begeman2009-06-051-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | build vectors with i64 elements will only appear on 32b x86 before legalize. Since vector widening occurs during legalize, and produces i64 build_vector elements, the dag combiner is never run on these before legalize splits them into 32b elements. Teach the build_vector dag combine in x86 back end to recognize consecutive loads producing the low part of the vector. Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes since that was required implicitly. Add a testcase for the transform. Old: subl $28, %esp movl 32(%esp), %eax movl 4(%eax), %ecx movl %ecx, 4(%esp) movl (%eax), %eax movl %eax, (%esp) movaps (%esp), %xmm0 pmovzxwd %xmm0, %xmm0 movl 36(%esp), %eax movaps %xmm0, (%eax) addl $28, %esp ret New: movl 4(%esp), %eax pmovzxwd (%eax), %xmm0 movl 8(%esp), %eax movaps %xmm0, (%eax) ret llvm-svn: 72957
* Don't do the X * 0.0 -> 0.0 transformation in instcombine, becauseDan Gohman2009-06-041-0/+3
| | | | | | | | instcombine doesn't know when it's safe. To partially compensate for this, introduce new code to do this transformation in dagcombine, which can use UnsafeFPMath. llvm-svn: 72872
* Revert 72707 and 72709, for the moment.Dale Johannesen2009-06-021-7/+9
| | | | llvm-svn: 72712
* Make the implicit inputs and outputs of target-independentDale Johannesen2009-06-011-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to) instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust all target-independent code to use this format. Most targets will still produce a Flag-setting target-dependent version when selection is done. X86 is converted to use i32 instead, which means TableGen needs to produce different code in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit in xxxInstrInfo, currently set only for X86; in principle this is temporary and should go away when all other targets have been converted. All relevant X86 instruction patterns are modified to represent setting and using EFLAGS explicitly. The same can be done on other targets. The immediate behavior change is that an ADC/ADD pair are no longer tightly coupled in the X86 scheduler; they can be separated by instructions that don't clobber the flags (MOV). I will soon add some peephole optimizations based on using other instructions that set the flags to feed into ADC. llvm-svn: 72707
* Do not try to create a MVT type of width 0.Evan Cheng2009-05-281-0/+2
| | | | llvm-svn: 72557
* Incorporate patch feedbacks.Evan Cheng2009-05-281-11/+17
| | | | llvm-svn: 72533
* Added optimization that narrow load / op / store and the 'op' is a bit ↵Evan Cheng2009-05-281-1/+93
| | | | | | | | | | | | | twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. llvm-svn: 72507
* Fix PR4254.Torok Edwin2009-05-231-2/+2
| | | | | | | | | | | The DAGCombiner created a negative shiftamount, stored in an unsigned variable. Later the optimizer eliminated the shift entirely as being undefined. Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288. Fix it by checking that the shiftamount is positive, and storing in a signed variable. llvm-svn: 72331
* Silence Release-Asserts warnings.Daniel Dunbar2009-05-181-6/+6
| | | | llvm-svn: 72011
* Rename PaddedSize to AllocSize, in the hope that thisDuncan Sands2009-05-091-1/+1
| | | | | | | will make it more obvious what it represents, and stop it being confused with the StoreSize. llvm-svn: 71349
* Do not use register as base ptr of pre- and post- inc/dec load / store nodes.Evan Cheng2009-05-061-1/+4
| | | | llvm-svn: 71098
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-291-5/+5
| | | | | | | which better identifies what the optimization is doing. And is more flexible for future uses. llvm-svn: 70440
* Implement review feedback for vector shuffle work.Nate Begeman2009-04-291-6/+14
| | | | llvm-svn: 70372
* Second attempt:Bill Wendling2009-04-291-7/+8
| | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. llvm-svn: 70343
OpenPOWER on IntegriCloud