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path: root/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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* Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.Rafael Espindola2012-11-141-1/+12
| | | | llvm-svn: 167912
* Be careful not to optimize a SELECT_CC into a SETCC post-legalization if the ↵Owen Anderson2012-11-031-23/+27
| | | | | | SETCC node would be illegal. llvm-svn: 167344
* Add a few more simple fast-math constant propagations and cancellations.Owen Anderson2012-11-011-0/+18
| | | | llvm-svn: 167200
* In various places throughout the code generator, there were specialUlrich Weigand2012-10-291-20/+16
| | | | | | | | | checks to avoid performing compile-time arithmetic on PPCDoubleDouble. Now that APFloat supports arithmetic on PPCDoubleDouble, those checks are no longer needed, and we can treat the type like any other. llvm-svn: 166958
* Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))Michael Liao2012-10-241-0/+71
| | | | | | | | - If more than 1 elemennts are defined and target supports the vectorized conversion, use the vectorized one instead to reduce the strength on conversion operation. llvm-svn: 166546
* Keep coding standard. Don't evaluate getNumOperands() every time.Jakub Staszak2012-10-241-1/+1
| | | | llvm-svn: 166531
* Clean up code and put transformation on (build_vec (ext x)) into a helper funcMichael Liao2012-10-231-55/+69
| | | | llvm-svn: 166519
* Simplify condition checking as CONCAT assume all inputs of the same type.Michael Liao2012-10-191-3/+3
| | | | llvm-svn: 166260
* In SimplifySelectOps we pulled two loads through a select node despite the ↵Nadav Rotem2012-10-181-0/+4
| | | | | | | | fact that one was dependent on the other. rdar://12513091 llvm-svn: 166196
* Revert part of r166049 back and enable test case in r166125.Michael Liao2012-10-171-0/+42
| | | | | | | | - Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid when '...' are all 'undef's. - r166125 relies on this transformation. llvm-svn: 166155
* Revert r166049Michael Liao2012-10-171-46/+0
| | | | | | - In general, it's unsafe for this transformation. llvm-svn: 166135
* Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_iMichael Liao2012-10-171-2/+17
| | | | | | | | - If the extracted vector has the same type of all vectored being concatenated together, it should be simplified directly into v_i, where i is the index of the element being extracted. llvm-svn: 166125
* Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)Michael Liao2012-10-161-0/+46
| | | | llvm-svn: 166049
* Refactor the AddrMode class out of TLI to its own header file.Nadav Rotem2012-10-081-1/+1
| | | | | | | | This class is used by LSR and a number of places in the codegen. This is the first step in de-coupling LSR from TLI, and creating a new interface in between them. llvm-svn: 165455
* Move TargetData to DataLayout.Micah Villmow2012-10-081-8/+8
| | | | llvm-svn: 165402
* Remove unused but set variable flagged by GCC.Benjamin Kramer2012-10-051-4/+0
| | | | llvm-svn: 165331
* Simplify code, don't or a bool with an uint64_t.Benjamin Kramer2012-10-051-2/+2
| | | | | | No functionality change. llvm-svn: 165321
* When merging connsecutive stores, use vectors to store the constant zero.Nadav Rotem2012-10-041-34/+57
| | | | llvm-svn: 165267
* Fix a cycle in the DAG. In this code we replace multiple loads with a single ↵Nadav Rotem2012-10-031-7/+19
| | | | | | | | | | | load and multiple stores with a single load. We create the wide loads and stores (and their chains) before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge loads with a different chain. When that happened, the assumption that it is safe to RAUW broke and a cycle was introduced. llvm-svn: 165148
* A DAGCombine optimization for mergeing consecutive stores to memory. The ↵Nadav Rotem2012-10-031-0/+395
| | | | | | | | | | | | | | | | | | | | | optimization is not profitable in many cases because modern processors perform multiple stores in parallel and merging stores prior to merging requires extra work. We handle two main cases: 1. Store of multiple consecutive constants: q->a = 3; q->4 = 5; In this case we store a single legal wide integer. 2. Store of multiple consecutive loads: int a = p->a; int b = p->b; q->a = a; q->b = b; In this case we load/store either ilegal vector registers or legal wide integer registers. llvm-svn: 165125
* Revert r164910 because it causes failures to several phase2 builds.Nadav Rotem2012-09-301-254/+0
| | | | llvm-svn: 164911
* A DAGCombine optimization for merging consecutive stores. This optimization ↵Nadav Rotem2012-09-301-0/+254
| | | | | | | | | | | | | | | | | | | is not profitable in many cases because moden processos can store multiple values in parallel, and preparing the consecutive store requires some work. We only handle these cases: 1. Consecutive stores where the values and consecutive loads. For example: int a = p->a; int b = p->b; q->a = a; q->b = b; 2. Consecutive stores where the values are constants. Foe example: q->a = 4; q->b = 5; llvm-svn: 164910
* Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile ofDuncan Sands2012-09-291-252/+0
| | | | | | | | | | | | | | | | | | | | buildbots. Original commit message: A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases because moden processos can store multiple values in parallel, and preparing the consecutive store requires some work. We only handle these cases: 1. Consecutive stores where the values and consecutive loads. For example: int a = p->a; int b = p->b; q->a = a; q->b = b; 2. Consecutive stores where the values are constants. Foe example: q->a = 4; q->b = 5; llvm-svn: 164890
* Tidy up to match coding standards. Remove 'else' after 'return' and moving ↵Craig Topper2012-09-291-27/+24
| | | | | | operators to end of preceding line. No functional change intended. llvm-svn: 164887
* Replace a couple if/elses around similar calls with conditional operators on ↵Craig Topper2012-09-291-17/+6
| | | | | | the varying arguments. No functional change. llvm-svn: 164886
* A DAGCombine optimization for merging consecutive stores. This optimization ↵Nadav Rotem2012-09-291-0/+252
| | | | | | | | | | | | | | | | | | | is not profitable in many cases because moden processos can store multiple values in parallel, and preparing the consecutive store requires some work. We only handle these cases: 1. Consecutive stores where the values and consecutive loads. For example: int a = p->a; int b = p->b; q->a = a; q->b = b; 2. Consecutive stores where the values are constants. Foe example: q->a = 4; q->b = 5; llvm-svn: 164885
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. ↵Sylvestre Ledru2012-09-271-19/+19
| | | | | | See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 llvm-svn: 164768
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-19/+19
| | | | llvm-svn: 164767
* Fix 80-col violations.Nadav Rotem2012-09-201-13/+19
| | | | llvm-svn: 164297
* Fix a dagcombine optimization. The optimization attempts to optimize a ↵Nadav Rotem2012-09-131-1/+2
| | | | | | | | | | | bitcast of fneg to integers by xoring the high-bit. This fails if the source operand is a vector because we need to negate each of the elements in the vector. Fix rdar://12281066 PR13813. llvm-svn: 163802
* Teach DAG combiner to constant fold FABS of a BUILD_VECTOR of ConstantFPs. ↵Craig Topper2012-09-111-22/+47
| | | | | | Factor similar code out of FNEG DAG combiner. llvm-svn: 163587
* Fix an assertion failure when optimising a shufflevector incorrectly into ↵James Molloy2012-09-101-0/+6
| | | | | | concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types. llvm-svn: 163511
* Teach DAG combiner to constant fold fneg of a BUILD_VECTOR of constants.Craig Topper2012-09-091-1/+25
| | | | llvm-svn: 163483
* Constify this properly. Found by gcc48 -Wcast-qual.Roman Divacky2012-09-051-4/+4
| | | | llvm-svn: 163256
* Fixed the DAG combiner to better handle the folding of AND nodes for vector ↵Silviu Baranga2012-09-051-1/+11
| | | | | | types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value. llvm-svn: 163203
* Teach DAG combine a number of tricks to simplify FMA expressions in ↵Owen Anderson2012-09-011-0/+64
| | | | | | fast-math mode. llvm-svn: 163051
* Fix typoMichael Liao2012-09-011-1/+1
| | | | llvm-svn: 163049
* Teach the DAG combiner to turn chains of FADDs (x+x+x+x+...) into FMULs by ↵Owen Anderson2012-08-301-1/+122
| | | | | | constants. This is only enabled in unsafe FP math mode, since it does not preserve rounding effects for all such constants. llvm-svn: 162956
* Rejected 169195. As Duncan commented, bitcasting to proper type is wrong ↵Stepan Dyatkovskiy2012-08-221-23/+3
| | | | | | approach. We need to insert some valid TRANCATE node here. llvm-svn: 162354
* Fixed DAGCombiner bug (found and localized by James Malloy):Stepan Dyatkovskiy2012-08-201-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DAGCombiner tries to optimise a BUILD_VECTOR by checking if it consists purely of get_vector_elts from one or two source vectors. If so, it either makes a concat_vectors node or a shufflevector node. However, it doesn't check the element type width of the underlying vector, so if you have this sequence: Node0: v4i16 = ... Node1: i32 = extract_vector_elt Node0 Node2: i32 = extract_vector_elt Node0 Node3: v16i8 = BUILD_VECTOR Node1, Node2, ... It will attempt to: Node0: v4i16 = ... NewNode1: v16i8 = concat_vectors Node0, ... Where this is actually invalid because the element width is completely different. This causes an assertion failure on DAG legalization stage. Fix: If output item type of BUILD_VECTOR differs from input item type. Make concat_vectors based on input element type and then bitcast it to the output vector type. So the case described above will transformed to: Node0: v4i16 = ... NewNode1: v8i16 = concat_vectors Node0, ... NewNode2: v16i8 = bitcast NewNode1 llvm-svn: 162195
* Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson2012-08-131-0/+42
| | | | | | various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. llvm-svn: 161807
* Added FMA functionality to X86 target.Elena Demikhovsky2012-08-011-8/+20
| | | | llvm-svn: 161110
* Fixed DAGCombine optimizations which generate select_cc for targetsNadav Rotem2012-07-231-33/+47
| | | | | | | | | | that do not support it (X86 does not lower select_cc). PR: 13428 Together with Michael Kuperstein <michael.m.kuperstein@intel.com> llvm-svn: 160619
* Remove tabs.Bill Wendling2012-07-191-1/+1
| | | | llvm-svn: 160475
* Back out r160101 and instead implement a dag combine to recover from ↵Evan Cheng2012-07-171-0/+28
| | | | | | instcombine transformation. llvm-svn: 160387
* Refactor the code that checks that all operands of a node are UNDEFs.Nadav Rotem2012-07-151-13/+7
| | | | | | | | | Add a micro-optimization to getNode of CONCAT_VECTORS when both operands are undefs. Can't find a testcase for this because VECTOR_SHUFFLE already handles undef operands, but Duncan suggested that we add this. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> llvm-svn: 160229
* Add a dagcombine optimization to convert concat_vectors of undefs into a ↵Nadav Rotem2012-07-141-0/+11
| | | | | | | | single undef. The unoptimized concat_vectors isd prevented the canonicalization of the vector_shuffle node. llvm-svn: 160221
* Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns ↵Owen Anderson2012-07-111-1/+2
| | | | | | | | an MVT::i1, i.e. before type legalization. This is a speculative fix for a problem on Mips reported by Akira Hatanaka. llvm-svn: 160036
* Improve the loading of load-anyext vectors by allowing the codegen to loadNadav Rotem2012-07-101-1/+1
| | | | | | | | | multiple scalars and insert them into a vector. Next, we shuffle the elements into the correct places, as before. Also fix a small dagcombine bug in SimplifyBinOpWithSameOpcodeHands, when the migration of bitcasts happened too late in the SelectionDAG process. llvm-svn: 159991
* Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional ↵Owen Anderson2012-07-091-0/+36
| | | | | | | | move, since there are only two possible values. Previously, this would become an integer extension operation, followed by a real integer->float conversion. llvm-svn: 159957
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