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path: root/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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* Add a missing case in visitADD.Dale Johannesen2008-11-271-0/+3
| | | | llvm-svn: 60137
* If the type legalizer actually legalized anythingDuncan Sands2008-11-241-181/+178
| | | | | | | | | | | | | (this doesn't happen that often, since most code does not use illegal types) then follow it by a DAG combiner run that is allowed to generate illegal operations but not illegal types. I didn't modify the target combiner code to distinguish like this between illegal operations and illegal types, so it will not produce illegal operations as well as not producing illegal types. llvm-svn: 59960
* Rename SetCCResultContents to BooleanContents. InDuncan Sands2008-11-231-1/+1
| | | | | | | practice these booleans are mostly produced by SetCC, however the concept is more general. llvm-svn: 59911
* - Move conversion of [SU]ADDO from DAG combiner into legalizer.Bill Wendling2008-11-221-34/+0
| | | | | | - Add "promote integer type" stuff to the legalizer for these nodes. llvm-svn: 59847
* Default to converting UADDO to the generic form that SADDO is converted to.Bill Wendling2008-11-211-1/+1
| | | | llvm-svn: 59801
* Remove chains. Unnecessary.Bill Wendling2008-11-211-6/+4
| | | | llvm-svn: 59783
* Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"Bill Wendling2008-11-211-3/+9
| | | | | | | because the boolean it returns to indicate an overflow may not be treated like as a flag. It could be stored to memory, for instance. llvm-svn: 59780
* Implement the sadd_with_overflow intrinsic. This is converted intoBill Wendling2008-11-211-0/+30
| | | | | | | | "ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the addition and then checks if the result is less than one of the operands. (If it is, then there was an overflow.) llvm-svn: 59779
* Fix for PR3040:Bill Wendling2008-11-111-18/+35
| | | | | | | | | The CC was changed, but wasn't checked to see if it was legal if the DAG combiner was being run after legalization. Threw in a couple of checks just to make sure that it's okay. As far as the PR is concerned, no back-end target actually exhibited this problem, so there isn't an associated testcase. llvm-svn: 59035
* Added support for the following definition of shufflevector Mon P Wang2008-11-101-2/+6
| | | | | | <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask> llvm-svn: 58964
* Type of shuffle mask has changed.Evan Cheng2008-11-051-1/+2
| | | | llvm-svn: 58751
* Don't produce invalid comparisons after legalize.Chris Lattner2008-10-281-2/+4
| | | | llvm-svn: 58320
* Use a legal integer type for vector shuffle maskDuncan Sands2008-10-191-4/+4
| | | | | | | | | elements. Otherwise LegalizeTypes will, reasonably enough, legalize the mask, which may result in it no longer being a BUILD_VECTOR node (LegalizeDAG simply ignores the legality or not of vector masks). llvm-svn: 57782
* Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman2008-10-181-0/+22
| | | | | | | | | | | | | | | | | | | | | | and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. llvm-svn: 57748
* Define patterns for shld and shrd that match immediateDan Gohman2008-10-171-5/+9
| | | | | | | | | | | | | | | | | | shift counts, and patterns that match dynamic shift counts when the subtract is obscured by a truncate node. Add DAGCombiner support for recognizing rotate patterns when the shift counts are defined by truncate nodes. Fix and simplify the code for commuting shld and shrd instructions to work even when the given instruction doesn't have a parent, and when the caller needs a new instruction. These changes allow LLVM to use the shld, shrd, rol, and ror instructions on x86 to replace equivalent code using two shifts and an or in many more cases. llvm-svn: 57662
* Rename LoadX to LoadExt.Evan Cheng2008-10-141-12/+12
| | | | llvm-svn: 57526
* Rename APFloat::convertToAPInt to bitcastToAPInt toDale Johannesen2008-10-091-3/+3
| | | | | | | make it clearer what the function does. No functional change. llvm-svn: 57325
* Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman2008-09-261-7/+7
| | | | | | | consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. llvm-svn: 56700
* Reapplying r56550Bill Wendling2008-09-241-13/+13
| | | | llvm-svn: 56553
* Temporarily revert r56550 until missing commit can be added.Eric Christopher2008-09-241-13/+13
| | | | llvm-svn: 56551
* Refactor the constant folding code into it's own function. And call it from bothBill Wendling2008-09-241-13/+13
| | | | | | | | | | the SelectionDAG and DAGCombiner code. The only functionality change is that now the DAG combiner is performing the constant folding for these operations instead of being a no-op. This is *not* in response to a bug, so there isn't a testcase. llvm-svn: 56550
* Per review feedback: Only performEvan Cheng2008-09-221-39/+27
| | | | | | | (srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c)) etc. when both "trunc" and "and" have single uses. llvm-svn: 56452
* Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* andDan Gohman2008-09-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | ConstantFP* instead of APInt and APFloat directly. This reduces the amount of time to create ConstantSDNode and ConstantFPSDNode nodes when ConstantInt* and ConstantFP* respectively are already available, as is the case in SelectionDAGBuild.cpp. Also, it reduces the amount of time to legalize constants into constant pools, and the amount of time to add ConstantFP operands to MachineInstrs, due to eliminating ConstantInt::get and ConstantFP::get calls. It increases the amount of work needed to create new constants in cases where the client doesn't already have a ConstantInt* or ConstantFP*, such as legalize expanding 64-bit integer constants to 32-bit constants. And it adds a layer of indirection for the accessor methods. But these appear to be outweight by the benefits in most cases. It will also make it easier to make ConstantSDNode and ConstantFPNode more consistent with ConstantInt and ConstantFP. llvm-svn: 56162
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-121-41/+48
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* In visitUREM, arrange for the temporary UDIV node to beDan Gohman2008-09-081-0/+1
| | | | | | revisited, consistent with the code in visitSREM. llvm-svn: 55923
* Revert my previous change -- the subtraction of two constants was a no-opBill Wendling2008-09-081-1/+1
| | | | | | | | | before. This is taken care of in the selection DAG pass. In my opinion, this should be in one place or the other. I.e., it should probably be removed from the DAG combiner (along with the other arithmetic transformations on constants that are essentially no-ops). llvm-svn: 55889
* ConvertBill Wendling2008-09-071-1/+1
| | | | | | | | // fold (sub c1, c2) -> c1-c2 from a no-op into an actual transformation. llvm-svn: 55886
* Fix a search+replace-o.Dan Gohman2008-09-051-1/+1
| | | | llvm-svn: 55824
* Clean up uses of TargetLowering::getTargetMachine.Dan Gohman2008-09-041-4/+4
| | | | llvm-svn: 55769
* Another situation where ROTR is cheaper than ROTL.Bill Wendling2008-08-311-3/+3
| | | | llvm-svn: 55577
* For this pattern, ROTR is the cheaper option.Bill Wendling2008-08-311-4/+4
| | | | llvm-svn: 55576
* - Fix comment so that it describes how the code really works:Bill Wendling2008-08-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotl x, y) // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotr x, (sub 32, y)) Example: (x == 0xDEADBEEF and y == 4) (x << 4) | (x >> 28) => 0xEADBEEF0 | 0x0000000D => 0xEADBEEFD (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => 0xEADBEEFD - Fix comment and code for second version. It wasn't using the rot* propertly. // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotr x, y) // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotl x, (sub 32, y)) (x << 28) | (x >> 4) => 0xD0000000 | 0x0DEADBEE => 0xDDEADBEE (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => (0xEADBEEFD) llvm-svn: 55575
* fix some 80-col violationsGabor Greif2008-08-301-19/+23
| | | | llvm-svn: 55571
* Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 ↵Evan Cheng2008-08-301-0/+60
| | | | | | shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). llvm-svn: 55558
* Fix 80 col. violations.Evan Cheng2008-08-291-2/+4
| | | | llvm-svn: 55551
* Back out 55498. It broken Apple style bootstrapping.Evan Cheng2008-08-291-106/+81
| | | | llvm-svn: 55549
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-299/+299
| | | | | | Node to reflect semantics llvm-svn: 55504
* Optimize DAGCombiner's worklist processing. Previously it startedDan Gohman2008-08-281-77/+102
| | | | | | | | | | | | | its work by putting all nodes in the worklist, requiring a big dynamic allocation. Now, DAGCombiner just iterates over the AllNodes list and maintains a worklist for nodes that are newly created or need to be revisited. This allows the worklist to stay small in most cases, so it can be a SmallVector. This has the side effect of making DAGCombine not miss a folding opportunity in alloca-align-rounding.ll. llvm-svn: 55498
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-2/+2
| | | | llvm-svn: 55394
* Disable DAGCombine's alignment inference in "fast" codegen mode.Dan Gohman2008-08-201-5/+8
| | | | llvm-svn: 55059
* Improve support for vector casts in LLVM IR and CodeGen.Dan Gohman2008-08-141-0/+4
| | | | llvm-svn: 54784
* Take the FrameOffset into account when computing the alignmentDan Gohman2008-08-111-1/+1
| | | | | | of stack objects. This fixes PR2656. llvm-svn: 54646
* Improve dagcombining for sext-loads and sext-in-reg nodes.Dan Gohman2008-07-311-9/+21
| | | | llvm-svn: 54239
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-701/+701
| | | | llvm-svn: 54128
* Tidy SDNode::use_iterator, and complete the transition to have itDan Gohman2008-07-271-8/+8
| | | | | | | parallel its analogue, Value::value_use_iterator. The operator* method now returns the user, rather than the use. llvm-svn: 54127
* Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to ↵Evan Cheng2008-07-221-1/+2
| | | | | | output a vector value. Patch by Nicolas Capens! llvm-svn: 53932
* Add titles to the various SelectionDAG viewGraph callsDan Gohman2008-07-211-18/+0
| | | | | | | that include useful information like the name of the block being viewed and the current phase of compilation. llvm-svn: 53872
* Add VerifyNode, a place to put sanity checks onDuncan Sands2008-07-211-1/+2
| | | | | | | | | | | | generic SDNode's (nodes with their own constructors should do sanity checking in the constructor). Add sanity checks for BUILD_VECTOR and fix all the places that were producing bogus BUILD_VECTORs, as found by "make check". My favorite is the BUILD_VECTOR with only two operands that was being used to build a vector with four elements! llvm-svn: 53850
* Revert 53729, after waking up in the middle ofDuncan Sands2008-07-181-4/+3
| | | | | | | | | | | | | | | | the night realising that it was wrong :) I think the reason the same type was being used for the shufflevec of indices as for the actual indices is so that if one of them needs splitting then so does the other. After my patch it might be that the indices need splitting but not the rest, yet there is no good way of handling that. I think the right solution is to not have the shufflevec be an operand at all: just have it be the list of numbers it actually is, stored as extra info in the node. llvm-svn: 53768
* Use a legal type for elements of the vector_shuffleDuncan Sands2008-07-171-3/+4
| | | | | | | | | | | | | | | | | | mask. These are just indices into the shuffled vector so their type is unrelated to the type of the shuffled elements (which is what was being used before). This fixes vec_shuffle-11.ll when using LegalizeTypes. What seems to have happened is that Dan's recent change r53687, which corrected the result type of the shuffle, somehow caused LegalizeTypes to notice that the mask operand was a BUILD_VECTOR with a legal type but elements of an illegal type (i64). LegalizeTypes legalized this by introducing a new BUILD_VECTOR of i32 and bitcasting it to the old type. But the mask operand is not supposed to be a bitcast but a straight BUILD_VECTOR of constants, causing a crash. llvm-svn: 53729
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