| Commit message (Collapse) | Author | Age | Files | Lines |
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for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.
llvm-svn: 23846
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llvm-svn: 23845
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that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
llvm-svn: 23835
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a lot throughout many programs. In particular, specfp triggers it a bunch for
constant FP nodes when you have code like cond ? 1.0 : -1.0.
If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:
%X = external global int
%Y = external global int
int* %test4(bool %C) {
%G = select bool %C, int* %X, int* %Y
ret int* %G
}
Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.
Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.
llvm-svn: 23781
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llvm-svn: 23777
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llvm-svn: 23774
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llvm-svn: 23764
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llvm-svn: 23756
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CodeGen/PowerPC/rlwinm.ll:test3
llvm-svn: 23755
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popping up in Fourinarow.
llvm-svn: 23722
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you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.
Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants. Woot!
llvm-svn: 23720
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llvm-svn: 23718
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llvm-svn: 23717
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the remainder of the failures introduced by my patch last night.
llvm-svn: 23714
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tests.
llvm-svn: 23713
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Kill some dead code.
llvm-svn: 23706
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out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.
Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.
llvm-svn: 23704
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like turning:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
into
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.
llvm-svn: 23703
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llvm-svn: 23694
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llvm-svn: 23693
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llvm-svn: 23692
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location, replace them with a new store of the last value. This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%
llvm-svn: 23691
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multiple results.
Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and
can be extended in the future, it is still useful. For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:
stw r6, lo16(l5_end_of_array)(r2)
addi r2, r5, -4
stwx r5, r4, r2
- lwzx r5, r4, r2
- rlwinm r5, r5, 0, 0, 30
stwx r5, r4, r2
lwz r2, -4(r4)
ori r2, r2, 1
llvm-svn: 23690
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sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.
llvm-svn: 23688
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llvm-svn: 23686
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llvm-svn: 23685
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llvm-svn: 23679
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llvm-svn: 23678
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llvm-svn: 23665
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C-X's
llvm-svn: 23662
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implements CodeGen/PowerPC/div-2.ll
llvm-svn: 23659
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llvm-svn: 23639
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with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
llvm-svn: 23636
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dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.
llvm-svn: 23634
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that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
llvm-svn: 23632
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llvm-svn: 23630
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Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23504
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select_cc bits and then wrap it in a convenience function for use with
regular select.
llvm-svn: 23389
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llvm-svn: 23371
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llvm-svn: 23302
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as setcc and select next.
llvm-svn: 23295
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llvm-svn: 23278
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as well as fixing how we replace old values with new values.
llvm-svn: 23260
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This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
llvm-svn: 23258
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that option for PowerPC's beta.
llvm-svn: 23253
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I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
llvm-svn: 23243
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values, and then we should be able to hook it up.
llvm-svn: 23231
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left to do).
llvm-svn: 23195
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statement in visit().
llvm-svn: 23185
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be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
llvm-svn: 23184
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