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path: root/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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* Make isLegalAddressingMode() taking DataLayout as an argumentMehdi Amini2015-07-091-1/+2
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11040 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241778
* Make TargetLowering::getShiftAmountTy() taking DataLayout as an argumentMehdi Amini2015-07-091-2/+1
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11037 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241776
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-091-11/+16
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241775
* early exits -> less indenting; NFCISanjay Patel2015-07-081-23/+22
| | | | llvm-svn: 241716
* Remove IsLittleEndian from TargetLowering and redirect to DataLayoutMehdi Amini2015-07-081-2/+2
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11017 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241655
* Redirect DataLayout from TargetMachine to Module in SelectionDAGMehdi Amini2015-07-071-24/+24
| | | | | | | | | | | | | | | | | | | | Summary: SelectionDAG itself is not invoking directly the DataLayout in the TargetMachine, but the "TargetLowering" class is still using it. I'll address it in a following commit. This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11000 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241618
* Reapply r240291: Fix shl folding in DAG combiner.Pawel Bylica2015-07-021-1/+1
| | | | | | | | The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared. It has been reverted previously because of some problems with comparing APInt with raw uint64_t. That has been fixed/changed with r241204. llvm-svn: 241254
* [DAGCombiner] Fix & simplify constant folding of sext/zext.Pawel Bylica2015-06-291-13/+11
| | | | | | | | | | | | | | | | Summary: This patch fixes the cases of sext/zext constant folding in DAG combiner where constans do not fit 64 bits. The fix simply removes un$ Test Plan: New regression test included. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10607 llvm-svn: 240991
* [SDAG] Now that we have a way to communicate the exact bit on sdiv use it to ↵Benjamin Kramer2015-06-271-0/+4
| | | | | | | | | | | | | | | | | simplify sdiv by a constant. We had a hack in SDAGBuilder in place to work around this but now we can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can perform this trick automatically. The added check in DAGCombiner is necessary to prevent exact sdiv by pow2 from regressing as the target-specific pow2 lowering is not aware of exact bits yet. This is mostly covered by existing tests. One side effect is that we get the better lowering for exact vector sdivs now too :) llvm-svn: 240891
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-261-14/+12
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240809
* [DAGCombine] fold (X >>?,exact C1) << C2 --> X << (C2-C1)Benjamin Kramer2015-06-261-0/+16
| | | | | | | Instcombine also does this but many opportunities only become visible after GEPs are lowered. llvm-svn: 240787
* DAGCombiner: Use pop_back_val()Matt Arsenault2015-06-251-2/+1
| | | | llvm-svn: 240709
* DAGCombiner: Remove redundant checkMatt Arsenault2015-06-251-1/+1
| | | | | | | MemIntrinsicSDNode is already a subclass of MemSDNode, so the MemSDNode check is sufficient. llvm-svn: 240672
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-3/+3
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Revert r240291: causes problems in self-hosted builds.Pawel Bylica2015-06-221-1/+1
| | | | llvm-svn: 240343
* Fix shl folding in DAG combiner.Pawel Bylica2015-06-221-1/+1
| | | | | | | | | | | | | | | | Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared. Test Plan: A regression test included. Reviewers: andreadb Reviewed By: andreadb Subscribers: andreadb, test, llvm-commits Differential Revision: http://reviews.llvm.org/D10602 llvm-svn: 240291
* [PM/AA] Hoist the AliasResult enum out of the AliasAnalysis class.Chandler Carruth2015-06-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow classes to implement the AA interface without deriving from the class or referencing an internal enum of some other class as their return types. Also, to a pretty fundamental extent, concepts such as 'NoAlias', 'MayAlias', and 'MustAlias' are first class concepts in LLVM and we aren't saving anything by scoping them heavily. My mild preference would have been to use a scoped enum, but that feature is essentially completely broken AFAICT. I'm extremely disappointed. For example, we cannot through any reasonable[1] means construct an enum class (or analog) which has scoped names but converts to a boolean in order to test for the possibility of aliasing. [1]: Richard Smith came up with a "solution", but it requires class templates, and lots of boilerplate setting up the enumeration multiple times. Something like Boost.PP could potentially bundle this up, but even that would be quite painful and it doesn't seem realistically worth it. The enum class solution would probably work without the need for a bool conversion. Differential Revision: http://reviews.llvm.org/D10495 llvm-svn: 240255
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-3/+3
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* [PM/AA] Remove the Location typedef from the AliasAnalysis class nowChandler Carruth2015-06-171-6/+4
| | | | | | | | | | | | that it is its own entity in the form of MemoryLocation, and update all the callers. This is an entirely mechanical change. References to "Location" within AA subclases become "MemoryLocation", and elsewhere "AliasAnalysis::Location" becomes "MemoryLocation". Hope that helps out-of-tree folks update. llvm-svn: 239885
* rename variables; NFCSanjay Patel2015-06-161-13/+13
| | | | | | ...because I see 'StoreBW' and read it as 'store bandwidth' llvm-svn: 239850
* extract some code into a helper function for MergeConsecutiveStores(); NFCISanjay Patel2015-06-161-43/+57
| | | | llvm-svn: 239847
* propagate IR-level fast-math-flags to DAG nodes, disabled by defaultSanjay Patel2015-06-161-5/+2
| | | | | | | | | | | | | | | | | | | | | | | This is an updated version of the patch that was checked in at: http://reviews.llvm.org/rL237046 but subsequently reverted because it exposed a bug in the DAG Combiner: http://reviews.llvm.org/D9893 This time, there's an enablement flag ("EnableFMFInDAG") around the code in SelectionDAGBuilder where we copy the set of FP optimization flags from IR instructions to DAG nodes. So, in theory, there should be no functional change from this patch as-is, but it will allow testing with the added functionality to proceed via "-enable-fmf-dag" passed to llc. This patch adds the minimum plumbing necessary to use IR-level fast-math-flags (FMF) in the backend without actually using them for anything yet. This is a follow-on to: http://reviews.llvm.org/rL235997 Differential Revision: http://reviews.llvm.org/D10403 llvm-svn: 239828
* Revert "Revert "Fix merges of non-zero vector stores""Matt Arsenault2015-06-161-6/+20
| | | | | | | | Reapply r239539. Don't assume the collected number of stores is the same vector size. Just take the first N stores to fill the vector. llvm-svn: 239825
* [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.Simon Pilgrim2015-06-131-0/+3
| | | | llvm-svn: 239682
* [DAGCombiner] Added BSWAP vector constant folding support.Simon Pilgrim2015-06-131-0/+12
| | | | llvm-svn: 239675
* Stripped trailing whitespace. NFC.Simon Pilgrim2015-06-131-5/+5
| | | | llvm-svn: 239674
* Revert "Fix merges of non-zero vector stores"Reid Kleckner2015-06-111-19/+6
| | | | | | | | This reverts commit r239539. It was causing SDAG assertions while building freetype. llvm-svn: 239543
* Fix merges of non-zero vector storesMatt Arsenault2015-06-111-6/+19
| | | | | | | | | | Now actually stores the non-zero constant instead of 0. I somehow forgot to include this part of r238108. The test change was just an independent instruction order swap, so just add another check line to satisfy CHECK-NEXT. llvm-svn: 239539
* [DAGCombiner] Added CTLZ vector constant folding support.Simon Pilgrim2015-06-081-2/+2
| | | | llvm-svn: 239305
* [DAGCombiner] Added CTTZ vector constant folding support.Simon Pilgrim2015-06-081-2/+2
| | | | llvm-svn: 239293
* [DAGCombiner] Added CTPOP vector constant folding support.Simon Pilgrim2015-06-071-1/+1
| | | | | | Added tests to the existing SSE/AVX test files. llvm-svn: 239252
* DAGCombiner: don't duplicate (fmul x, c) in visitFNEG if fneg is freeFiona Glaser2015-06-051-1/+2
| | | | | | | | | | For targets with a free fneg, this fold is always a net loss if it ends up duplicating the multiply, so definitely avoid it. This might be true for some targets without a free fneg too, but I'll leave that for future investigation. llvm-svn: 239167
* Simplify code; NFC.Andrea Di Biagio2015-06-051-7/+7
| | | | | | | | Also, moved test cases from CodeGen/X86/fold-buildvector-bug.ll into CodeGen/X86/buildvec-insertvec.ll and regenerated CHECK lines using update_llc_test_checks.py. llvm-svn: 239142
* [DAGCombiner] Fix wrong folding of a build_vector into a blend with zero.Andrea Di Biagio2015-06-041-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Method 'visitBUILD_VECTOR' in the DAGCombiner knows how to combine a build_vector of a bunch of extract_vector_elt nodes and constant zero nodes into a shuffle blend with a zero vector. However, method 'visitBUILD_VECTOR' forgot that a floating point build_vector may contain negative zero as well as positive zero. Example: define <2 x double> @example(<2 x double> %A) { entry: %0 = extractelement <2 x double> %A, i32 0 %1 = insertelement <2 x double> undef, double %0, i32 0 %2 = insertelement <2 x double> %1, double -0.0, i32 1 ret <2 x double> %2 } Before this patch, llc (with -mattr=+sse4.1) wrongly generated movq %xmm0, %xmm0 # xmm0 = xmm0[0],zero So, the sign bit of the negative zero was effectively lost. This patch fixes the problem by adding explicit checks for positive zero. With this patch, llc produces the following code for the example above: movhpd .LCPI0_0(%rip), %xmm0 where .LCPI0_0 referes to a 'double -0'. llvm-svn: 239070
* Pass address space to isLegalAddressingMode in DAGCombinerMatt Arsenault2015-06-041-1/+5
| | | | | | | No test because I don't know of a target that makes use of address spaces and indexed load / store. llvm-svn: 239051
* Add target hook to allow merging stores of nonzero constantsMatt Arsenault2015-05-241-3/+10
| | | | | | | | | | On GPU targets, materializing constants is cheap and stores are expensive, so only doing this for zero vectors was silly. Most of the new testcases aren't optimally merged, and are for later improvements. llvm-svn: 238108
* [X86][SSE] Improve support for 128-bit vector sign extensionSimon Pilgrim2015-05-211-3/+20
| | | | | | | | | | This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization). It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner. Differential Revision: http://reviews.llvm.org/D9848 llvm-svn: 237885
* DAGCombiner: Continue combining if FoldConstantArithmetic() fails.Matthias Braun2015-05-201-73/+95
| | | | | | | | | | | | DAG.FoldConstantArithmetic() can fail even though both operands are Constants if OpaqueConstants are involved. Continue trying other combine possibilities in tis case. Differential Revision: http://reviews.llvm.org/D6946 Somewhat related to PR21801 / rdar://19211454 llvm-svn: 237822
* use 'auto *' for pointers; clearer usage, no deep copyingSanjay Patel2015-05-191-2/+2
| | | | llvm-svn: 237719
* tidy upSanjay Patel2015-05-191-5/+5
| | | | | | | | 1. remove duplicate local variable 2. add local variable with name to match comment 3. remove useless comment llvm-svn: 237715
* use range-based for-loopSanjay Patel2015-05-191-7/+4
| | | | llvm-svn: 237711
* use range-based for loopSanjay Patel2015-05-191-5/+5
| | | | llvm-svn: 237705
* DAGCombiner: Factor common pattern into isOneConstant() function. NFCMatthias Braun2015-05-191-35/+32
| | | | llvm-svn: 237645
* DAGCombiner: Factor common pattern into isAllOnesConstant() function. NFCMatthias Braun2015-05-191-46/+43
| | | | llvm-svn: 237644
* DAGCombiner: Use isNullConstant() where possibleMatthias Braun2015-05-191-19/+13
| | | | llvm-svn: 237643
* Revert accidental change in r237633Matthias Braun2015-05-181-1/+1
| | | | llvm-svn: 237635
* DAGCombiner: Factor common pattern into isNullConstant() function. NFCMatthias Braun2015-05-181-71/+59
| | | | llvm-svn: 237633
* [DAGCombine] Be more pedantic about use iteration in ↵Hal Finkel2015-05-181-11/+12
| | | | | | | | | | | | | | | | | | | | | | | CombineToPreIndexedLoadStore In CombineToPreIndexedLoadStore, when the offset is a constant, we have code that looks for other uses of the pointer which are constant offset computations so that they can be rewritten in terms of the updated pointer so that we don't need to keep a copy of the base pointer to compute these constant offsets. Unfortunately, when it iterated over the uses, it did so by SDNodes, and so we could confuse ourselves if the base pointer was produced by a node that had multiple results (because we would not immediately exclude uses of the other node results). This was reported as PR22755. Unfortunately, we don't have a test case (and I've also been unable to produce one thus far), but at least the mistake is clear. The right way to fix this problem is to make use of the information contained in the use iterators to filter out any uses of other results of the node producing the base pointer. This should be mostly NFC, but should also fix PR22755 (for which, unfortunately, we have no in-tree test case). llvm-svn: 237576
* Revert r237046. See the testcase on the thread where r237046 was committed.Nick Lewycky2015-05-131-2/+5
| | | | llvm-svn: 237317
* propagate IR-level fast-math-flags to DAG nodes; 2nd try; NFCSanjay Patel2015-05-111-5/+2
| | | | | | | | | | | | | | | | | | | | | | | This is a less ambitious version of: http://reviews.llvm.org/rL236546 because that was reverted in: http://reviews.llvm.org/rL236600 because it caused memory corruption that wasn't related to FMF but was actually due to making nodes with 2 operands derive from a plain SDNode rather than a BinarySDNode. This patch adds the minimum plumbing necessary to use IR-level fast-math-flags (FMF) in the backend without actually using them for anything yet. This is a follow-on to: http://reviews.llvm.org/rL235997 ...which split the existing nsw / nuw / exact flags and FMF into their own struct. llvm-svn: 237046
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