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* Simplify RegScavenger::forward a bit more.Jakob Stoklund Olesen2009-08-081-65/+53
| | | | | | | | | | | Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. llvm-svn: 78465
* Back out some of recent register scavenger change by John Mosby. It broke a ↵Evan Cheng2009-08-071-27/+14
| | | | | | number of ARM tests. llvm-svn: 78421
* Get rid of RegScavenger::backwards() before the bitrot spreads.Jakob Stoklund Olesen2009-08-061-64/+0
| | | | | | If we need it one day, there is nothing wrong with putting it back in. llvm-svn: 78337
* Reg Scavenging generalization (Thumb support):John Mosby2009-08-061-27/+52
| | | | | | | - start support for new PEI w/reg alloc, allow running RS from emit{Pro,Epi}logue() target hooks. - fix minor issue with recursion detection. llvm-svn: 78318
* Clean up the handling of two-address operands in RegScavenger.Jakob Stoklund Olesen2009-08-041-12/+3
| | | | | | This fixes PR4528. llvm-svn: 78107
* Don't give implicit machine operands special treatment in the register ↵Jakob Stoklund Olesen2009-08-041-5/+2
| | | | | | | | | scavenger. Imp-def is *not* allowed to redefine a live register. Imp-use is *not* allowed to use a dead register. llvm-svn: 78106
* Fix PR4528. This scavenger assertion is too strict. The two-address value isEvan Cheng2009-08-041-1/+2
| | | | | | | | | killed by another operand. There is probably a better fix. Either 1) scavenger can look at other operands, or 2) livevariables can be smarter about kill markers. Patches welcome. llvm-svn: 78072
* Fix issue in regscavenger when scavenging a callee-saved register that has ↵Jakob Stoklund Olesen2009-08-021-1/+8
| | | | | | not been spilled. llvm-svn: 77912
* Scavenger asserts.Jakob Stoklund Olesen2009-08-021-2/+11
| | | | | | | Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier. Allow redefinition of a sub-register of a live register. llvm-svn: 77904
* Ignore undef uses.Evan Cheng2009-07-221-0/+3
| | | | llvm-svn: 76799
* Fix bug in RegScavenger::scavengeRegister().Jakob Stoklund Olesen2009-07-151-1/+1
| | | | | | | | | | | | | Reserved registers are not candidates for scavenging, and they were removed from the candidate list like this: CreateRegClassMask(RC, Candidates); Candidates ^= ReservedRegs; However, when there are reserved registers outside RC, this causes invalid bits to be set in Candidates. llvm-svn: 75847
* Fix assert(0) conversion, as suggested by Chris.Torok Edwin2009-07-121-3/+2
| | | | llvm-svn: 75423
* Convert more assert(0)+abort() -> LLVM_UNREACHABLE,Torok Edwin2009-07-111-2/+2
| | | | | | and abort()/exit() -> llvm_report_error(). llvm-svn: 75363
* Remove special handling of implicit_def. Fix a couple more bugs in ↵Evan Cheng2009-07-011-22/+9
| | | | | | | | liveintervalanalysis and coalescer handling of implicit_def. Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def. llvm-svn: 74601
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves ↵Evan Cheng2009-07-011-1/+7
| | | | | | the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. llvm-svn: 74580
* Temporarily restore the scavenger implicit_def checking code. MachineOperand ↵Evan Cheng2009-06-301-5/+23
| | | | | | isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.). llvm-svn: 74519
* Add a bit IsUndef to MachineOperand. This indicates the def / use register ↵Evan Cheng2009-06-301-26/+8
| | | | | | | | | | operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing. This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def. llvm-svn: 74518
* If killed register is defined by implicit_def, do not clear it since it's ↵Evan Cheng2009-06-121-5/+12
| | | | | | live range may overlap another def of same register. llvm-svn: 73255
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-091-4/+2
| | | | | | | | | | | | register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). llvm-svn: 68714
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-0/+1
| | | | llvm-svn: 61715
* Silience unused warnings.Devang Patel2008-12-231-0/+2
| | | | llvm-svn: 61390
* Initialize the ImplicitDefed member, to avoid getting staleDan Gohman2008-12-191-0/+1
| | | | | | data from a previous block. llvm-svn: 61237
* Fix a typo in a comment.Dan Gohman2008-12-021-1/+1
| | | | llvm-svn: 60434
* - Register scavenger should use MachineRegisterInfo and internal map to find ↵Evan Cheng2008-11-201-32/+62
| | | | | | | | | the first use of a register after a given machine instruction. - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. llvm-svn: 59697
* Make the same change to RegScavenger::backward.Evan Cheng2008-11-181-9/+28
| | | | llvm-svn: 59566
* We also need to keep the operand index for two address check.Evan Cheng2008-11-181-9/+11
| | | | llvm-svn: 59562
* Register scavenger should process early clobber defs first. A dead early ↵Evan Cheng2008-11-181-23/+37
| | | | | | clobber def should not interfere with a normal def which happens one slot later. llvm-svn: 59559
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-7/+7
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Minor const-correctness fixes.Dan Gohman2008-07-071-1/+1
| | | | llvm-svn: 53196
* Fix some constructs that gcc-4.4 warns about.Duncan Sands2008-05-271-1/+2
| | | | llvm-svn: 51591
* Allow registers defined by implicit_def to be clobbered.Evan Cheng2008-04-101-6/+15
| | | | llvm-svn: 49512
* 1. IMPLICIT_DEF can *re-define* any register.Evan Cheng2008-04-051-2/+42
| | | | | | | 2. Coalescer can now create an interesting situation where a register def can reaches itself without being killed. llvm-svn: 49246
* Something that kills a super-register alsoBill Wendling2008-03-071-2/+1
| | | | | | kills the sub-register. llvm-svn: 48038
* Fixed a register scavenger bug. If a def is re-defining part of a super ↵Evan Cheng2008-03-071-3/+8
| | | | | | register, there must be an implicit def of the super-register on the MI. llvm-svn: 48024
* When setting the "unused" info, take into account something like this:Bill Wendling2008-03-061-8/+38
| | | | | | | | %r3<def> = OR %x3<kill>, %x3 We don't want to mark the %r3 as unused even though it's a sub-register of %x3. llvm-svn: 48003
* Refactor code. Remove duplicated functions that basically do the same thing asEvan Cheng2008-03-051-15/+16
| | | | | | findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. llvm-svn: 47927
* Make the register scavenger update the bookkeeping values for sub/superBill Wendling2008-03-031-3/+39
| | | | | | registers. llvm-svn: 47861
* Fix typos.Bill Wendling2008-02-161-2/+2
| | | | llvm-svn: 47200
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
| | | | llvm-svn: 46930
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-5/+5
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-3/+3
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-3/+3
| | | | llvm-svn: 45484
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-1/+1
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-5/+5
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* Better assertion messages.Evan Cheng2007-07-051-3/+4
| | | | llvm-svn: 37890
* If call frame is not part of stack frame and no dynamic alloc, ↵Evan Cheng2007-05-011-4/+5
| | | | | | eliminateFrameIndex() must adjust SP offset with size of call frames. llvm-svn: 36625
* Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng2007-04-261-1/+1
| | | | llvm-svn: 36483
* Bad bad bug. findRegisterUseOperand() returns -1 if a use if not found.Evan Cheng2007-04-031-1/+1
| | | | llvm-svn: 35618
* Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable toDale Johannesen2007-03-261-15/+15
| | | | | | hopefully forestall similar errors. llvm-svn: 35362
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