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path: root/llvm/lib/CodeGen/RegisterCoalescer.cpp
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* Fix PR14732 by handling all kinds of IMPLICIT_DEF live ranges.Jakob Stoklund Olesen2013-01-031-8/+37
| | | | | | | | | | | | | | | | Most IMPLICIT_DEF instructions are removed by the ProcessImplicitDefs pass, and a few are reinserted by PHIElimination when a PHI argument is <undef>. RegisterCoalescer was assuming that all IMPLICIT_DEF live ranges look like those created by PHIElimination, and that their live range never leaves the basic block. The PR14732 test case does tricks with PHI nodes that causes a longer IMPLICIT_DEF live range to appear. This happens very rarely, but RegisterCoalescer should be able to handle it. llvm-svn: 171435
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+2
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Avoid rewriting instructions twice.Jakob Stoklund Olesen2012-11-291-0/+9
| | | | | | | | | This could cause miscompilations in targets where sub-register composition is not always idempotent (ARM). <rdar://problem/12758887> llvm-svn: 168837
* Make the LiveRegMatrix analysis available to targets.Jakob Stoklund Olesen2012-11-281-1/+1
| | | | | | | | | | | No functional change, just moved header files. Targets can inject custom passes between register allocation and rewriting. This makes it possible to tweak the register allocation before rewriting, using the full global interference checking available from LiveRegMatrix. llvm-svn: 168806
* Remove duplicated #includes.Jakub Staszak2012-11-271-4/+0
| | | | llvm-svn: 168712
* Use array_pod_sort instead of std::sort.Andrew Trick2012-11-161-41/+36
| | | | llvm-svn: 168203
* Fix an obvious merge bug in -join-globalcopies (disabled).Andrew Trick2012-11-151-1/+3
| | | | | | | | Jakub Staszak spotted this in review. I don't notice these things until I manually rerun benchmarks. But reducing unit tests is a very high priority. llvm-svn: 168021
* Use reserve() to avoid vector reallocation.Jakub Staszak2012-11-141-0/+1
| | | | llvm-svn: 167991
* canJoinPhys method doesn't modify CoalescerPair. Make it const.Jakub Staszak2012-11-141-2/+2
| | | | llvm-svn: 167972
* Revert -join-splitedges to a boolean cmd line option.Andrew Trick2012-11-131-3/+2
| | | | llvm-svn: 167880
* The MachineScheduler does not currently require JoinSplitEdges.Andrew Trick2012-11-131-4/+4
| | | | | | | This option will eventually either be enabled unconditionally or replaced by a more general live range splitting optimization. llvm-svn: 167879
* Fix -join-splitedges: my previous "cleanup" broke it.Andrew Trick2012-11-131-1/+1
| | | | | | | Working on reducing unit tests. This won't be enabled unless a subtarget enables misched. llvm-svn: 167851
* misched: Allow subtargets to enable misched and dependent options.Andrew Trick2012-11-131-10/+34
| | | | | | | | | | | | This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. llvm-svn: 167826
* Added RegisterCoalescer support for joining global copies first.Andrew Trick2012-11-131-20/+80
| | | | | | | | | | | | This adds the -join-globalcopies option which can be enabled by default once misched is also enabled. Ideally, the register coalescer would be able to split local live ranges in a way that produces copies that can be easily resolved by the scheduler. Until then, this heuristic should be good enough to at least allow the scheduler to run after coalescing. llvm-svn: 167825
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-131-23/+10
| | | | | | Block priorities still apply outside loops. llvm-svn: 167793
* Cleanup -join-splitedges. Make the loop more obvious.Andrew Trick2012-11-121-5/+2
| | | | llvm-svn: 167785
* Added a temporary option to avoid critical edges splitting.Andrew Trick2012-11-121-16/+55
| | | | | | | | | This teaches the register coalescer to be less prone to split critical edges. I am currently benchmarking this with the new (post-coalescer) scheduler. I plan to enable this by default and remove the option as soon as misched is enabled. llvm-svn: 167758
* Exploit the new identity composition in composeSubRegIndices().Jakob Stoklund Olesen2012-11-011-12/+8
| | | | | | | The static compose() function in RegisterCoalescer was doing the exact same thing. llvm-svn: 167198
* Completely disallow partial copies in adjustCopiesBackFrom().Jakob Stoklund Olesen2012-10-291-1/+2
| | | | | | | | | | | | Partial copies can show up even when CoalescerPair.isPartial() returns false. For example: %vreg24:dsub_0<def> = COPY %vreg31:dsub_0; QPR:%vreg24,%vreg31 Such a partial-partial copy is not good enough for the transformation adjustCopiesBackFrom() needs to do. llvm-svn: 166944
* Never attempt to join an early-clobber def with a regular kill.Jakob Stoklund Olesen2012-10-271-0/+14
| | | | | | This fixes PR14194. llvm-svn: 166880
* Don't crash when the Assignments vector is empty.Jakob Stoklund Olesen2012-10-211-1/+1
| | | | | | Reported by Vincent Lejeune using an out-of-tree target. llvm-svn: 166398
* Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen2012-10-161-344/+1
| | | | | | A fix for PR14098, including the test case is in the next commit. llvm-svn: 166067
* Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola2012-10-161-1/+344
| | | | | | llvm+clang+compiler-rt bootstrap. llvm-svn: 166046
* Remove RegisterClassInfo::isReserved() and isAllocatable().Jakob Stoklund Olesen2012-10-151-2/+2
| | | | | | Clients can use the equivalent functions in MRI. llvm-svn: 165990
* Drop <def,dead> flags when merging into an unused lane.Jakob Stoklund Olesen2012-10-131-4/+9
| | | | | | | | | | | | The new coalescer can merge a dead def into an unused lane of an otherwise live vector register. Clear the <dead> flag when that happens since the flag refers to the full virtual register which is still live after the partial dead def. This fixes PR14079. llvm-svn: 165877
* Fix coalescing with IMPLICIT_DEF values.Jakob Stoklund Olesen2012-10-121-21/+54
| | | | | | | | | | | | | | | | PHIElimination inserts IMPLICIT_DEF instructions to guarantee that all PHI predecessors have a live-out value. These IMPLICIT_DEF values are not considered to be real interference when coalescing virtual registers: %vreg1 = IMPLICIT_DEF %vreg2 = MOV32r0 When joining %vreg1 and %vreg2, the IMPLICIT_DEF instruction and its value number should simply be erased since the %vreg2 value number now provides a live-out value for the PHI predecesor block. llvm-svn: 165813
* Remove the old coalescer algorithm.Jakob Stoklund Olesen2012-10-021-344/+1
| | | | | | | The new algorithm has been enabled by default for almost a week now and seems to be stable. llvm-svn: 165062
* Make sure the whole live range is covered when values are pruned twice.Jakob Stoklund Olesen2012-10-021-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | JoinVals::pruneValues() calls LIS->pruneValue() to avoid conflicts when overlapping two different values. This produces a set of live range end points that are used to reconstruct the live range (with SSA update) after joining the two registers. When a value is pruned twice, the set of end points was insufficient: v1 = DEF v1 = REPLACE1 v1 = REPLACE2 KILL v1 The end point at KILL would only reconstruct the live range from REPLACE2 to KILL, leaving the range REPLACE1-REPLACE2 dead. Add REPLACE2 as an end point in this case so the full live range is reconstructed. This fixes PR13999. llvm-svn: 165056
* Remove <def,read-undef> flags from partial redefinitions.Jakob Stoklund Olesen2012-09-271-0/+6
| | | | | | | | | The new coalescer can turn a full virtual register definition into a partial redef by merging another value into an unused vector lane. Make sure to clear the <read-undef> flag on such defs. llvm-svn: 164807
* Enable the new coalescer algorithm by default.Jakob Stoklund Olesen2012-09-271-1/+1
| | | | | | | The new coalescer is better at merging values into unused vector lanes, improving NEON code. llvm-svn: 164794
* Ignore PHI-defs for -new-coalescer interference checks.Jakob Stoklund Olesen2012-09-201-4/+8
| | | | | | | | A PHI can't create interference on its own. If two live ranges interfere at a PHI, they must also interfere when leaving one of the PHI predecessors. llvm-svn: 164330
* Extend -new-coalescer SSA update to handle mapped values as well.Jakob Stoklund Olesen2012-09-201-6/+62
| | | | | | | | | | | | | The old-fashioned many-to-one value mapping doesn't always work when merging vector lanes. A value can map to multiple different values, and it can even be necessary to insert new PHIs. When a value number is defined by a copy from a value number that required SSa update, include the live range of the copied value number in the SSA update as well. It is not necessarily a copy of the original value number any longer. llvm-svn: 164329
* Resolve conflicts involving dead vector lanes for -new-coalescer.Jakob Stoklund Olesen2012-09-191-9/+155
| | | | | | | | | | | | | | | | | | | | | A common coalescing conflict in vector code is lane insertion: %dst = FOO %src = BAR %dst:ssub0 = COPY %src The live range of %src interferes with the ssub0 lane of %dst, but that lane is never read after %src would have clobbered it. That makes it safe to merge the live ranges and eliminate the COPY: %dst = FOO %dst:ssub0 = BAR This patch teaches the new coalescer to resolve conflicts where dead vector lanes would be clobbered, at least as long as the clobbered vector lanes don't escape the basic block. llvm-svn: 164250
* Merge into undefined lanes under -new-coalescer.Jakob Stoklund Olesen2012-09-171-2/+53
| | | | | | | | | | | | | | | | | Add LIS::pruneValue() and extendToIndices(). These two functions are used by the register coalescer when merging two live ranges requires more than a trivial value mapping as supported by LiveInterval::join(). The pruneValue() function can remove the part of a value number that is going to conflict in join(). Afterwards, extendToIndices can restore the live range, using any new dominating value numbers and updating the SSA form. Use this complex value mapping to support merging a register into a vector lane that has a conflicting value, but the clobbered lane is undef. llvm-svn: 164074
* Add alternative coalescing algorithm under a flag.Jakob Stoklund Olesen2012-09-161-0/+478
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The live range of an SSA value forms a sub-tree of the dominator tree. That means the live ranges of two values overlap if and only if the def of one value lies within the live range of the other. This can be used to simplify the interference checking a bit: Visit each def in the two registers about to be joined. Check for interference against the value that is live in the other register at the def point only. It is not necessary to scan the set of overlapping live ranges, this interference check can be done while computing the value mapping required for the final live range join. The new algorithm is prepared to handle more complicated conflict resolution - We can allow overlapping live ranges with different values as long as the differing lanes are undef or unused in the other register. The implementation in this patch doesn't do that yet, it creates code that is nearly identical to the old algorithm's, except: - The new stripCopies() function sees through multiple copies while the old RegistersDefinedFromSameValue() only can handle one. - There are a few rare cases where the new algorithm can erase an IMPLICIT_DEF instuction that RegistersDefinedFromSameValue() couldn't handle. llvm-svn: 163991
* Don't depend on kill flags in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-09-151-1/+1
| | | | | | | Kill flags are removed more and more aggressively during the register allocation passes, it is better to get information from LiveIntervals. llvm-svn: 163972
* Tidy up a few more uses of MF.getFunction()->getName().David Blaikie2012-08-221-2/+1
| | | | | | | | Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). llvm-svn: 162367
* Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper2012-08-221-1/+1
| | | | | | did getFunction()->getName(). Remove includes of Function.h that are no longer needed. llvm-svn: 162347
* Delete merged physreg copies in joinReservedPhysReg().Jakob Stoklund Olesen2012-08-031-0/+5
| | | | | | | Previously, the identity copy would survive through register allocation before it was removed by the rewriter. llvm-svn: 161269
* Eliminate the VNInfo::hasPHIKill() flag.Jakob Stoklund Olesen2012-08-031-25/+1
| | | | | | | | | | The only real user of the flag was removeCopyByCommutingDef(), and it has been switched to LiveIntervals::hasPHIKill(). All the code changed by this patch was only concerned with computing and propagating the flag. llvm-svn: 161255
* Make the hasPHIKills flag a computed property.Jakob Stoklund Olesen2012-08-031-4/+6
| | | | | | | | | | | | | The VNInfo::HAS_PHI_KILL is only half supported. We precompute it in LiveIntervalAnalysis, but it isn't properly updated by live range splitting and functions like shrinkToUses(). It is only used in one place: RegisterCoalescer::removeCopyByCommutingDef(). This patch changes that function to use a new LiveIntervals::hasPHIKill() function that computes the flag for a given value number. llvm-svn: 161254
* Clear kill flags in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-07-311-0/+2
| | | | | | | | | We are extending live ranges, so kill flags are not accurate. They aren't needed until they are recomputed after RA anyway. <rdar://problem/11950722> llvm-svn: 161023
* Now that RegistersDefinedFromSameValue handles one instruction being anRafael Espindola2012-07-011-14/+4
| | | | | | | | | implicit_def, the other instruction can be anything, including instructions that define multiple values. Be careful about that and don't assume what operand 0 is. Fixes pr13249. llvm-svn: 159509
* Handle implicit_defs in the register coalescer. I am still trying to produceRafael Espindola2012-06-301-27/+40
| | | | | | a reduced testcase, but this fixes pr13209. llvm-svn: 159479
* Fix a crash in --debug code.Jakob Stoklund Olesen2012-06-221-2/+6
| | | | | | Don't try to print out the live range of a physreg. llvm-svn: 159021
* Remove some redundant LIS->hasInterval() checks.Jakob Stoklund Olesen2012-06-221-22/+0
| | | | | | | These functions only operate on virtual registers now, and they all have live ranges. llvm-svn: 159015
* Remove LiveIntervals::trackingRegUnits().Jakob Stoklund Olesen2012-06-221-19/+5
| | | | | | | | | With regunit liveness permanently enabled, this function would always return true. Also remove now obsolete code for checking physreg interference. llvm-svn: 159006
* Update regunits in RegisterCoalescer::reMaterializeTrivialDef.Jakob Stoklund Olesen2012-06-211-6/+4
| | | | | | Old code would only update physreg live intervals. llvm-svn: 158881
* Use regunit liveness in RegisterCoalescer when it is available.Jakob Stoklund Olesen2012-06-151-13/+21
| | | | | | | We only do very limited physreg coalescing now, but we still merge virtual registers into reserved registers. llvm-svn: 158526
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