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* Added an additional PBQP problem builder which adds coalescing costs (both ↵Lang Hames2010-09-211-14/+127
| | | | | | between pairs of virtuals, and between virtuals and physicals). llvm-svn: 114429
* Unbreak msvc build.Benjamin Kramer2010-09-181-1/+1
| | | | llvm-svn: 114284
* Fixed non-const iterator error.Lang Hames2010-09-181-1/+1
| | | | llvm-svn: 114273
* Added a separate class (PBQPBuilder) for PBQP Problem construction. This ↵Lang Hames2010-09-181-172/+309
| | | | | | | | | | | | class can be extended to support custom constraints. For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming no issues with the builder system come up. To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor. llvm-svn: 114272
* Added support for register allocators to record which intervals are spill ↵Lang Hames2010-09-021-1/+4
| | | | | | | | intervals, and where the uses and defs of the original intervals were in the original code. Spill intervals can be hidden using the "-rmf-intervals=virt-nospills*" option. llvm-svn: 112811
* The register allocator shouldn't consider allocating reserved registers. ↵Jim Grosbach2010-09-011-2/+8
| | | | | | PBQP version. llvm-svn: 112742
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* Switched to rendering after allocation (but before rewriting) in PBQP.Lang Hames2010-07-201-2/+3
| | | | | | | Updated renderer to use allocation information from VirtRegMap (if available) to render spilled intervals differently. llvm-svn: 108815
* Render MachineFunctions to HTML pages, with options to render registerLang Hames2010-07-191-0/+5
| | | | | | | | pressure estimates and liveness alongside. Still experimental. llvm-svn: 108698
* Added -pbqp-pre-coalescing flag to PBQP. If enabled this will cause PBQP to ↵Lang Hames2010-07-181-0/+8
| | | | | | | | | | require LoopSplitter be run prior to register allocation. Entirely for testing purposes at the moment. llvm-svn: 108634
* Iterating over sets of pointers in a heuristic was a bad idea. SwitchingLang Hames2010-07-171-2/+10
| | | | | | | | | | | any command line paramater changed the register allocation produced by PBQP. Turns out variety is not the spice of life. Fixed some comparators, added others. All good now. llvm-svn: 108613
* Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen2010-07-161-2/+4
| | | | | | TII::isMoveInstr is going tobe completely removed. llvm-svn: 108507
* Don't use getPhysicalRegisterRegClass in PBQP. The existing checks that theRafael Espindola2010-07-121-15/+10
| | | | | | | | | | physical register can be allocated in the class of the virtual are sufficient. I think that the test for virtual registers is more strict than it needs to be, it should be possible to coalesce two virtual registers the class of one is a subclass of the other. llvm-svn: 108118
* improve portability to systems that don't have powf/modf (e.g. solaris 9)Chris Lattner2010-05-151-1/+1
| | | | | | patch by Evzen Muller! llvm-svn: 103876
* Remove terminating dot in description. Inconsistency pointedDuncan Sands2010-02-181-1/+1
| | | | | | out by Russell Wallace. llvm-svn: 96579
* Removed an early out which was causing the PBQP allocator to not compute ↵Lang Hames2010-02-171-4/+0
| | | | | | live-in sets or run the rewriter. llvm-svn: 96450
* Fixed a bug in the PBQP allocator's findCoalesces method.Lang Hames2010-02-091-6/+17
| | | | | | Previously spill registers, whose def indexes are not defined, would sometimes be improperly marked as coalescable with conflicting registers. The new findCoalesces routine conservatively assumes that any register with at least one undefined def is not coalescable with any register it interferes with. llvm-svn: 95636
* New PBQP solver.Lang Hames2010-01-261-24/+17
| | | | | | | | | * Fixed a reduction bug which occasionally led to infinite-cost (invalid) register allocation solutions despite the existence finite-cost solutions. * Significantly reduced memory usage (>50% reduction). * Simplified a lot of the solver code. llvm-svn: 94514
* Change errs() to dbgs().David Greene2010-01-051-7/+7
| | | | llvm-svn: 92586
* Moved spill weight calculation out of SimpleRegisterCoalescing and into its ↵Lang Hames2009-12-141-0/+2
| | | | | | own pass: CalculateSpillWeights. llvm-svn: 91273
* Added an assert to the PBQP allocator to catch infinite cost solutions which ↵Lang Hames2009-11-151-0/+5
| | | | | | might otherwise lead to miscompilations. llvm-svn: 88829
* The Indexes Patch.Lang Hames2009-11-031-2/+4
| | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-1/+1
| | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-031-1/+1
| | | | llvm-svn: 83254
* Tabs -> spaces, and remove trailing whitespace.Daniel Dunbar2009-09-201-3/+3
| | | | llvm-svn: 82355
* Remove some not-really-used variables, as warnedDuncan Sands2009-09-061-4/+0
| | | | | | about by icc (#593, partial). Patch by Erick Tryzelaar. llvm-svn: 81115
* Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames2009-09-041-1/+2
| | | | | | | | a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. llvm-svn: 81040
* Fixed a test that ensures the LocalRewriter does not attempt toLang Hames2009-09-031-1/+1
| | | | | | | | | avoid reloads by reusing clobbered registers. This was causing issues in 256.bzip2 when compiled with PIC for a while (starting at r78217), though the problem has since been masked. llvm-svn: 80872
* Suppress build warning in -AssertsDaniel Dunbar2009-08-201-0/+1
| | | | llvm-svn: 79564
* Added an option to have the PBQP allocator attempt coalescing during allocation.Lang Hames2009-08-191-1/+10
| | | | llvm-svn: 79397
* Changes DOUT references in the PBQP allocator to use DEBUG(errs() ...)Lang Hames2009-08-181-11/+7
| | | | llvm-svn: 79378
* Added RegisterCoalescer to required passes for PBQP.Lang Hames2009-08-121-0/+1
| | | | llvm-svn: 78840
* Remove unnecessary throw() specifications; LLVM doesn't use exceptions.Dan Gohman2009-08-111-1/+1
| | | | llvm-svn: 78667
* Remove unnecessary casts.Dan Gohman2009-08-111-1/+1
| | | | llvm-svn: 78664
* Modified VNInfo. The "copy" member is now a union which holds the copy for a ↵Lang Hames2009-08-101-2/+2
| | | | | | register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg. llvm-svn: 78620
* Remove a bunch of debugging code that was slowing PBQP down by 25% or so.Owen Anderson2009-08-101-45/+0
| | | | llvm-svn: 78601
* Fix some -Asserts unused variable warnings.Daniel Dunbar2009-08-081-0/+1
| | | | llvm-svn: 78447
* New C++ PBQP solver. Currently about as fast (read _slow_) as the old C ↵Lang Hames2009-08-061-106/+178
| | | | | | based solver, but I'll be working to improve that. The PBQP allocator has been updated to use the new solver. llvm-svn: 78354
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-9/+10
| | | | llvm-svn: 77754
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-1/+3
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
* VNInfo cleanup.Lang Hames2009-06-171-1/+1
| | | | llvm-svn: 73634
* Move register allocation preference (or hint) from LiveInterval to ↵Evan Cheng2009-06-141-2/+1
| | | | | | MachineRegisterInfo. This allows more passes to set them. llvm-svn: 73346
* Untabification.Bill Wendling2009-05-301-1/+1
| | | | llvm-svn: 72604
* Prevented reg0 from being added to MBB live-in set, which was causing issuesLang Hames2009-05-171-0/+5
| | | | | | for PostRAScheduler. llvm-svn: 71991
* Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.Lang Hames2009-05-061-4/+5
| | | | llvm-svn: 71057
* In some rare cases, the register allocator can spill registers but end up ↵Evan Cheng2009-05-031-9/+7
| | | | | | | | | | not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants. Not yet enabled. This is part 1. More coming. llvm-svn: 70787
* It has finally happened. Spiller is now using live interval info.Evan Cheng2009-04-211-1/+1
| | | | | | This fixes a very subtle bug. vr defined by an implicit_def is allowed overlap with any register since it doesn't actually modify anything. However, if it's used as a two-address use, its live range can be extended and it can be spilled. The spiller must take care not to emit a reload for the vn number that's defined by the implicit_def. This is both a correctness and performance issue. llvm-svn: 69743
* r66870 missed this out.Sanjiv Gupta2009-03-171-0/+1
| | | | llvm-svn: 67082
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