| Commit message (Collapse) | Author | Age | Files | Lines |
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TII::isMoveInstr is going tobe completely removed.
llvm-svn: 108507
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physical register can be allocated in the class of the virtual are sufficient.
I think that the test for virtual registers is more strict than it needs to be,
it should be possible to coalesce two virtual registers the class of one
is a subclass of the other.
llvm-svn: 108118
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patch by Evzen Muller!
llvm-svn: 103876
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out by Russell Wallace.
llvm-svn: 96579
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live-in sets or run the rewriter.
llvm-svn: 96450
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Previously spill registers, whose def indexes are not defined, would sometimes be improperly marked as coalescable with conflicting registers. The new findCoalesces routine conservatively assumes that any register with at least one undefined def is not coalescable with any register it interferes with.
llvm-svn: 95636
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* Fixed a reduction bug which occasionally led to infinite-cost (invalid)
register allocation solutions despite the existence finite-cost solutions.
* Significantly reduced memory usage (>50% reduction).
* Simplified a lot of the solver code.
llvm-svn: 94514
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llvm-svn: 92586
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own pass: CalculateSpillWeights.
llvm-svn: 91273
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might otherwise lead to miscompilations.
llvm-svn: 88829
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This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.
For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.
The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.
llvm-svn: 85979
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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llvm-svn: 83254
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llvm-svn: 82355
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about by icc (#593, partial). Patch by Erick Tryzelaar.
llvm-svn: 81115
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a new class, MachineInstrIndex, which hides arithmetic details from
most clients. This is a step towards allowing the register allocator
to update/insert code during allocation.
llvm-svn: 81040
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avoid reloads by reusing clobbered registers.
This was causing issues in 256.bzip2 when compiled with PIC for
a while (starting at r78217), though the problem has since been masked.
llvm-svn: 80872
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llvm-svn: 79564
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llvm-svn: 79397
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llvm-svn: 79378
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llvm-svn: 78840
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llvm-svn: 78667
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llvm-svn: 78664
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register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg.
llvm-svn: 78620
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llvm-svn: 78601
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llvm-svn: 78447
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based solver, but I'll be working to improve that. The PBQP allocator has been updated to use the new solver.
llvm-svn: 78354
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llvm-svn: 77754
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- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
llvm-svn: 77019
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llvm-svn: 73634
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MachineRegisterInfo. This allows more passes to set them.
llvm-svn: 73346
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llvm-svn: 72604
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for PostRAScheduler.
llvm-svn: 71991
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llvm-svn: 71057
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not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.
Not yet enabled. This is part 1. More coming.
llvm-svn: 70787
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This fixes a very subtle bug. vr defined by an implicit_def is allowed overlap with any register since it doesn't actually modify anything. However, if it's used as a two-address use, its live range can be extended and it can be spilled. The spiller must take care not to emit a reload for the vn number that's defined by the implicit_def. This is both a correctness and performance issue.
llvm-svn: 69743
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llvm-svn: 67082
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llvm-svn: 66870
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No (intended) functionality change.
llvm-svn: 66720
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sub-register indices as well.
llvm-svn: 62600
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* Removed trailing whitespace
llvm-svn: 61927
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* Removed trailing whitespace
llvm-svn: 61926
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llvm-svn: 59629
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several bug-fixes.
llvm-svn: 59414
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llvm-svn: 59293
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instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
llvm-svn: 57521
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llvm-svn: 57018
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
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Contributed by Lang Hames.
llvm-svn: 56959
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