summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/RegAllocLocal.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Fix typo in commentBrian Gaeke2003-08-151-1/+1
| | | | llvm-svn: 7906
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-131-1/+1
| | | | llvm-svn: 7823
* Fix bugs handling ESP in alloca referencesChris Lattner2003-08-051-3/+6
| | | | llvm-svn: 7591
* Revert previous change, and be really anal about what physical registers can do.Chris Lattner2003-08-051-27/+19
| | | | llvm-svn: 7588
* Don't bother calculating info unless its needed. May reduce number of stack ↵Chris Lattner2003-08-041-4/+2
| | | | | | slots created. llvm-svn: 7584
* * Fix spelling of 'necessary'Chris Lattner2003-08-041-26/+61
| | | | | | | * Add a lot more DEBUG output, which is better structured than before * Fix bug: Jello/2003-08-04-PhysRegLiveFailure.llx llvm-svn: 7583
* Set debug typesChris Lattner2003-08-031-0/+1
| | | | llvm-svn: 7533
* Wrap at 80 columnsChris Lattner2003-08-031-1/+2
| | | | llvm-svn: 7503
* Move DEBUG to Debug.hChris Lattner2003-08-011-1/+2
| | | | llvm-svn: 7497
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-271-3/+3
| | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341
* Fix tab infestation!Chris Lattner2003-05-121-45/+45
| | | | llvm-svn: 6109
* Debug output should go to cerr, not cout, because that's where bytecode goes.Misha Brukman2003-05-041-2/+2
| | | | llvm-svn: 6002
* Fix problems with empty basic blocksChris Lattner2003-01-161-1/+1
| | | | llvm-svn: 5326
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-6/+6
| | | | llvm-svn: 5272
* * Convert to use LiveVariable analysisChris Lattner2003-01-131-261/+251
| | | | | | | | | | | * Convert to use PHIElimination pass * Don't spill values which have just been reloaded (big win reducing spills) * Add experimental support for eliminating spills before TwoAddress instructions. It currently is broken so it is #ifdef'd out. * Use new "is terminator" flag on instructions instead of looking for branches and returns explicitly. llvm-svn: 5219
* Rename FunctionFrameInfo to MachineFrameInfoChris Lattner2002-12-281-1/+1
| | | | llvm-svn: 5200
* * Convert to be a MachineFunctionPass instanceChris Lattner2002-12-281-196/+64
| | | | | | | | | | | | | | * Use new FunctionFrameInfo object to manage stack slots instead of doing it directly * Adjust to new MRegisterInfo API * Don't take a TM as a ctor argument * Don't keep track of which callee saved registers are modified * Don't emit prolog/epilog code or spill/restore code for callee saved regs * Use new allocation_order_begin/end iterators to simplify dramatically the logic for picking registers to allocate * Machine PHI nodes can no longer contain constant arguments llvm-svn: 5195
* Adjust to simpler spill interfaceChris Lattner2002-12-251-35/+64
| | | | | | Only spill and reload caller saved registers that are actually modified. llvm-svn: 5145
* Substantial fixes to live range handling, fixing several problems, gettingChris Lattner2002-12-241-27/+35
| | | | | | strtol to not miscompile, and fixing bug: 2002-12-23-LocalRAProblem.llx llvm-svn: 5132
* * Fix several register aliasing bugsChris Lattner2002-12-181-39/+148
| | | | | | | * Add a new option to eliminate spilling of registers that are only used within a basic block. llvm-svn: 5106
* Use new reginfo interfaceChris Lattner2002-12-171-31/+7
| | | | llvm-svn: 5099
* Add prolog/epilog spills/reloads to countersChris Lattner2002-12-171-4/+7
| | | | | | Move X86 specific alignment gunk to X86 files llvm-svn: 5096
* Fix many bugs, regallocator now saves callee-save registers instead of targetChris Lattner2002-12-171-52/+163
| | | | llvm-svn: 5093
* * Fix a gross X86 hack that was intended to avoid allocating SP and BPChris Lattner2002-12-161-5/+38
| | | | | | * Implement register alias set support llvm-svn: 5082
* Initial checkin of "local" register allocator. Bugs are still present.Chris Lattner2002-12-161-0/+490
llvm-svn: 5078
OpenPOWER on IntegriCloud