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path: root/llvm/lib/CodeGen/RegAllocLocal.cpp
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* Eliminate data relocations by using NULL instead of global empty list.Jim Laskey2006-07-211-15/+19
| | | | llvm-svn: 29250
* 80 colsAndrew Lenharth2006-07-201-2/+2
| | | | llvm-svn: 29221
* Reduce number of exported symbolsAndrew Lenharth2006-07-201-4/+4
| | | | llvm-svn: 29220
* Use hidden visibility to make symbols in an anonymous namespace getChris Lattner2006-06-281-1/+2
| | | | | | dropped. This shrinks libllvmgcc.dylib another 67K llvm-svn: 28975
* Teach the local allocator to know that live-in values (e.g. arguments) areChris Lattner2006-06-151-0/+20
| | | | | | | live at function entry. This prevents it from using arg registers for other purposes before the arguments are used. llvm-svn: 28809
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-041-3/+3
| | | | llvm-svn: 28102
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
| | | | llvm-svn: 25515
* Nuke noop copies.Chris Lattner2005-11-091-4/+11
| | | | llvm-svn: 24258
* Disable some overly-aggressive checking code. This speeds up the localChris Lattner2005-11-091-1/+2
| | | | | | allocator from 23s to 11s on kc++ in debug mode. llvm-svn: 24255
* Change this code ot pass register classes into the stack slot spiller/reloaderChris Lattner2005-09-301-2/+2
| | | | | | | code. PrologEpilogInserter hasn't been updated yet though, so targets cannot use this info. llvm-svn: 23536
* adjust to new live variables interfaceChris Lattner2005-08-231-2/+2
| | | | llvm-svn: 22992
* Remove trailing whitespaceMisha Brukman2005-04-211-1/+1
| | | | llvm-svn: 21420
* Update this pass to set PhysRegsUsed info in MachineFunction.Chris Lattner2005-01-231-1/+13
| | | | llvm-svn: 19792
* Clean up the MachineBasicBlock.h file, percolating #includes into this file.Chris Lattner2004-10-261-0/+1
| | | | | | Patch contributed by Morten Ofstad llvm-svn: 17251
* Changes For Bug 352Reid Spencer2004-09-011-4/+4
| | | | | | | | Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. llvm-svn: 16137
* Reduce usage of MRegisterInfo::getRegClassChris Lattner2004-08-151-2/+2
| | | | llvm-svn: 15784
* Nuke ifdef'd out codeChris Lattner2004-08-151-33/+0
| | | | llvm-svn: 15777
* Stop using CreateStackObject(RegClass*)Chris Lattner2004-08-151-1/+2
| | | | llvm-svn: 15775
* These methods no longer take a TargetRegisterClass* operand.Chris Lattner2004-08-151-2/+2
| | | | llvm-svn: 15774
* These files don't need to include <iostream> since they include ↵Brian Gaeke2004-07-211-1/+0
| | | | | | "Support/Debug.h". llvm-svn: 15089
* Fix a recent regression in Applications/sgefa that Alkis pointed out to me.Chris Lattner2004-06-161-2/+2
| | | | | | | | The vector may actually be empty if the register that we are marking as recently used is not actually allocatable. This happens for physical registers that are not allocatable, like the ST(x) registers on X86. llvm-svn: 14195
* Adjust to new TargetMachine interfaceChris Lattner2004-06-021-1/+1
| | | | llvm-svn: 13956
* Change MRegisterInfo::foldMemoryOperand to return the foldedAlkis Evlogimenos2004-03-141-4/+3
| | | | | | instruction to make the API more flexible. llvm-svn: 12386
* Uncomment assertions that register# != 0 on calls toAlkis Evlogimenos2004-02-261-12/+18
| | | | | | | MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes to relevant files. llvm-svn: 11882
* No need to clear the map here, it will always be emptyChris Lattner2004-02-261-1/+0
| | | | llvm-svn: 11868
* Add DenseMap template and actually use it for for mapping virtual regsAlkis Evlogimenos2004-02-251-13/+8
| | | | | | to objects. llvm-svn: 11840
* Refactor rewinding code for finding the first terminator of a basicAlkis Evlogimenos2004-02-231-5/+1
| | | | | | | | | | | | block into MachineBasicBlock::getFirstTerminator(). This also fixes a bug in the implementation of the above in both RegAllocLocal and InstrSched, where instructions where added after the terminator if the basic block's only instruction was a terminator (it shouldn't matter for RegAllocLocal since this case never occurs in practice). llvm-svn: 11748
* Another bug fix for empty MBB'sChris Lattner2004-02-221-1/+1
| | | | llvm-svn: 11716
* Fix a bug where we were implicitly assuming that there would be at leastChris Lattner2004-02-221-2/+2
| | | | | | one terminator instruction in each basic block. llvm-svn: 11714
* Make 'fold' statistic's description the same in both allocators.Alkis Evlogimenos2004-02-211-2/+3
| | | | llvm-svn: 11687
* Fix problem fusing spill code into instructions: we didn't update the liveChris Lattner2004-02-191-0/+3
| | | | | | | variable information to take into account the change of instruction address. llvm-svn: 11628
* Rename reloads/spills to loads/stores.Alkis Evlogimenos2004-02-191-5/+5
| | | | llvm-svn: 11619
* Remove the -disable-kill option. The register allocator is buggy with it,Chris Lattner2004-02-171-50/+39
| | | | | | and it was only for debugging in the first place. llvm-svn: 11557
* Add support to the local allocator for fusing spill code into the instructionsChris Lattner2004-02-171-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that need them. This is very useful on CISCy targets like the X86 because it reduces the total spill pressure, and makes better use of it's (large) instruction set. Though the X86 backend doesn't know how to rewrite many instructions yet, this already makes a substantial difference on 176.gcc for example: Before: Time: 8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator Code quality: 734559 asm-printer - Number of machine instrs printed 111395 ra-local - Number of registers reloaded 79902 ra-local - Number of registers spilled 231554 x86-peephole - Number of peephole optimization performed After: Time: 7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator Code quality: 733083 asm-printer - Number of machine instrs printed 2379 ra-local - Number of reloads fused into instructions 109046 ra-local - Number of registers reloaded 79881 ra-local - Number of registers spilled 230658 x86-peephole - Number of peephole optimization performed So by fusing 2300 instructions, we reduced the static number of instructions by 1500, and reduces the number of peepholes (and thus the work) by about 900. This also clearly reduces the number of reload/spill instructions that are emitted. llvm-svn: 11542
* Fix a bug in my previous refactoring change... arg!Chris Lattner2004-02-171-1/+3
| | | | llvm-svn: 11535
* Once we have a way to fold spill code reloads into instructions, we have a ↵Chris Lattner2004-02-171-2/+17
| | | | | | way to use it. :) llvm-svn: 11517
* Refactor code a bit. No functionality changes, though the comment hints at ↵Chris Lattner2004-02-171-30/+46
| | | | | | things to come. llvm-svn: 11515
* Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos2004-02-151-1/+1
| | | | | | | | | | MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. llvm-svn: 11477
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-131-3/+3
| | | | llvm-svn: 11393
* Use getNumVirtualRegs().Alkis Evlogimenos2004-02-131-41/+34
| | | | | | Whitespace cleanups. llvm-svn: 11389
* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-121-11/+10
| | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. llvm-svn: 11340
* Do not use MachineOperand::isVirtualRegister either!Chris Lattner2004-02-101-4/+4
| | | | llvm-svn: 11283
* Eliminate users of MachineOperand::isPhysicalRegisterChris Lattner2004-02-101-2/+2
| | | | llvm-svn: 11278
* Another nice speedup for the register allocator. This time, we replaceChris Lattner2004-02-091-37/+55
| | | | | | | | the Virt2PhysRegMap std::map with an std::vector. This speeds up the register allocator another (almost) 40%, from .72->.45s in a release build of LLC on 253.perlbmk. llvm-svn: 11219
* Change the PhysRegsUsed map into a dense array. Seeing that this is a mappingChris Lattner2004-02-091-34/+35
| | | | | | | | | | | | | from physical registers, and they are always dense, it makes sense to not have a ton of RBtree overhead. This change speeds up regalloclocal about ~30% on 253.perlbmk, from .35s -> .27s in the JIT (in LLC, it goes from .74 -> .55). Now live variable analysis is the slowest codegen pass. Of course it doesn't help that we have to run it twice, because regalloclocal doesn't update it, but even if it did it would be the slowest pass (now it's just the 2x slowest pass :( llvm-svn: 11215
* Finegrainify namespacification, use new MRegisterInfo::isVirtualRegisterChris Lattner2004-01-311-8/+6
| | | | | | method llvm-svn: 11037
* Correctly compute live variable information for physical registersAlkis Evlogimenos2004-01-131-3/+12
| | | | | | | | | | | | | | when an implicitely defined register is later used by an alias. For example: call foo %reg1024 = mov %AL The call implicitely defines EAX but only AL is used. Before this fix no information was available on AL. Now EAX and all its aliases except AL get defined and die at the call instruction whereas AL lives to be killed by the assignment. llvm-svn: 10813
* Remove TwoAddressInstruction from the public headers and add an IDAlkis Evlogimenos2003-12-181-2/+1
| | | | | | instead, since this pass doesn't expose any state to its users. llvm-svn: 10520
* Modify local register allocator to use the two-address instruction pass.Alkis Evlogimenos2003-12-181-18/+5
| | | | llvm-svn: 10513
* Change interface of MachineOperand as follows:Alkis Evlogimenos2003-12-141-6/+7
| | | | | | | | | | | | | | | a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. llvm-svn: 10461
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