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path: root/llvm/lib/CodeGen/RegAllocLocal.cpp
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* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-121-11/+10
| | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. llvm-svn: 11340
* Do not use MachineOperand::isVirtualRegister either!Chris Lattner2004-02-101-4/+4
| | | | llvm-svn: 11283
* Eliminate users of MachineOperand::isPhysicalRegisterChris Lattner2004-02-101-2/+2
| | | | llvm-svn: 11278
* Another nice speedup for the register allocator. This time, we replaceChris Lattner2004-02-091-37/+55
| | | | | | | | the Virt2PhysRegMap std::map with an std::vector. This speeds up the register allocator another (almost) 40%, from .72->.45s in a release build of LLC on 253.perlbmk. llvm-svn: 11219
* Change the PhysRegsUsed map into a dense array. Seeing that this is a mappingChris Lattner2004-02-091-34/+35
| | | | | | | | | | | | | from physical registers, and they are always dense, it makes sense to not have a ton of RBtree overhead. This change speeds up regalloclocal about ~30% on 253.perlbmk, from .35s -> .27s in the JIT (in LLC, it goes from .74 -> .55). Now live variable analysis is the slowest codegen pass. Of course it doesn't help that we have to run it twice, because regalloclocal doesn't update it, but even if it did it would be the slowest pass (now it's just the 2x slowest pass :( llvm-svn: 11215
* Finegrainify namespacification, use new MRegisterInfo::isVirtualRegisterChris Lattner2004-01-311-8/+6
| | | | | | method llvm-svn: 11037
* Correctly compute live variable information for physical registersAlkis Evlogimenos2004-01-131-3/+12
| | | | | | | | | | | | | | when an implicitely defined register is later used by an alias. For example: call foo %reg1024 = mov %AL The call implicitely defines EAX but only AL is used. Before this fix no information was available on AL. Now EAX and all its aliases except AL get defined and die at the call instruction whereas AL lives to be killed by the assignment. llvm-svn: 10813
* Remove TwoAddressInstruction from the public headers and add an IDAlkis Evlogimenos2003-12-181-2/+1
| | | | | | instead, since this pass doesn't expose any state to its users. llvm-svn: 10520
* Modify local register allocator to use the two-address instruction pass.Alkis Evlogimenos2003-12-181-18/+5
| | | | llvm-svn: 10513
* Change interface of MachineOperand as follows:Alkis Evlogimenos2003-12-141-6/+7
| | | | | | | | | | | | | | | a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. llvm-svn: 10461
* Remove unecessary if statements when looping on ImplicitDefs.Alkis Evlogimenos2003-12-131-7/+7
| | | | llvm-svn: 10444
* Make assertion stricter. Since the source operands are allocated atAlkis Evlogimenos2003-12-051-1/+1
| | | | | | | this point, the second operand must be a physical register (it cannot be a virtual one). llvm-svn: 10292
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-1/+4
| | | | llvm-svn: 9903
* standardize command line option namesChris Lattner2003-10-241-1/+1
| | | | llvm-svn: 9496
* Added LLVM project notice to the top of every C++ source file.John Criswell2003-10-201-0/+7
| | | | | | Header files will be on the way. llvm-svn: 9298
* Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefsAlkis Evlogimenos2003-10-081-20/+23
| | | | | | | | | | | | | | | | | | | | | and TargetInstrDescriptor::ImplicitUses to always point to a null terminated array and never be null. So there is no need to check for pointer validity when iterating over those sets. Code that looked like: if (const unsigned* AS = TID.ImplicitDefs) { for (int i = 0; AS[i]; ++i) { // use AS[i] } } was changed to: for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) { // use *AS } llvm-svn: 8960
* Fix bug: Jello/2003-08-23-RegisterAllocatePhysReg.llChris Lattner2003-08-231-13/+21
| | | | llvm-svn: 8095
* Fix bug: Jello/2003-08-15-AllocaAssertion.llChris Lattner2003-08-171-8/+18
| | | | llvm-svn: 7916
* Fix typo in commentBrian Gaeke2003-08-151-1/+1
| | | | llvm-svn: 7906
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-131-1/+1
| | | | llvm-svn: 7823
* Fix bugs handling ESP in alloca referencesChris Lattner2003-08-051-3/+6
| | | | llvm-svn: 7591
* Revert previous change, and be really anal about what physical registers can do.Chris Lattner2003-08-051-27/+19
| | | | llvm-svn: 7588
* Don't bother calculating info unless its needed. May reduce number of stack ↵Chris Lattner2003-08-041-4/+2
| | | | | | slots created. llvm-svn: 7584
* * Fix spelling of 'necessary'Chris Lattner2003-08-041-26/+61
| | | | | | | * Add a lot more DEBUG output, which is better structured than before * Fix bug: Jello/2003-08-04-PhysRegLiveFailure.llx llvm-svn: 7583
* Set debug typesChris Lattner2003-08-031-0/+1
| | | | llvm-svn: 7533
* Wrap at 80 columnsChris Lattner2003-08-031-1/+2
| | | | llvm-svn: 7503
* Move DEBUG to Debug.hChris Lattner2003-08-011-1/+2
| | | | llvm-svn: 7497
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-271-3/+3
| | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341
* Fix tab infestation!Chris Lattner2003-05-121-45/+45
| | | | llvm-svn: 6109
* Debug output should go to cerr, not cout, because that's where bytecode goes.Misha Brukman2003-05-041-2/+2
| | | | llvm-svn: 6002
* Fix problems with empty basic blocksChris Lattner2003-01-161-1/+1
| | | | llvm-svn: 5326
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-6/+6
| | | | llvm-svn: 5272
* * Convert to use LiveVariable analysisChris Lattner2003-01-131-261/+251
| | | | | | | | | | | * Convert to use PHIElimination pass * Don't spill values which have just been reloaded (big win reducing spills) * Add experimental support for eliminating spills before TwoAddress instructions. It currently is broken so it is #ifdef'd out. * Use new "is terminator" flag on instructions instead of looking for branches and returns explicitly. llvm-svn: 5219
* Rename FunctionFrameInfo to MachineFrameInfoChris Lattner2002-12-281-1/+1
| | | | llvm-svn: 5200
* * Convert to be a MachineFunctionPass instanceChris Lattner2002-12-281-196/+64
| | | | | | | | | | | | | | * Use new FunctionFrameInfo object to manage stack slots instead of doing it directly * Adjust to new MRegisterInfo API * Don't take a TM as a ctor argument * Don't keep track of which callee saved registers are modified * Don't emit prolog/epilog code or spill/restore code for callee saved regs * Use new allocation_order_begin/end iterators to simplify dramatically the logic for picking registers to allocate * Machine PHI nodes can no longer contain constant arguments llvm-svn: 5195
* Adjust to simpler spill interfaceChris Lattner2002-12-251-35/+64
| | | | | | Only spill and reload caller saved registers that are actually modified. llvm-svn: 5145
* Substantial fixes to live range handling, fixing several problems, gettingChris Lattner2002-12-241-27/+35
| | | | | | strtol to not miscompile, and fixing bug: 2002-12-23-LocalRAProblem.llx llvm-svn: 5132
* * Fix several register aliasing bugsChris Lattner2002-12-181-39/+148
| | | | | | | * Add a new option to eliminate spilling of registers that are only used within a basic block. llvm-svn: 5106
* Use new reginfo interfaceChris Lattner2002-12-171-31/+7
| | | | llvm-svn: 5099
* Add prolog/epilog spills/reloads to countersChris Lattner2002-12-171-4/+7
| | | | | | Move X86 specific alignment gunk to X86 files llvm-svn: 5096
* Fix many bugs, regallocator now saves callee-save registers instead of targetChris Lattner2002-12-171-52/+163
| | | | llvm-svn: 5093
* * Fix a gross X86 hack that was intended to avoid allocating SP and BPChris Lattner2002-12-161-5/+38
| | | | | | * Implement register alias set support llvm-svn: 5082
* Initial checkin of "local" register allocator. Bugs are still present.Chris Lattner2002-12-161-0/+490
llvm-svn: 5078
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