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* Don't recalculate the loop info and loop dominators analyses if they'reBill Wendling2008-01-041-0/+2
| | | | | | preserved. llvm-svn: 45596
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-9/+9
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Switch over to MachineLoopInfo.Evan Cheng2007-12-111-4/+4
| | | | llvm-svn: 44838
* Live interval splitting:Evan Cheng2007-11-171-5/+13
| | | | | | | | | | | | | | | | | | | When a live interval is being spilled, rather than creating short, non-spillable intervals for every def / use, split the interval at BB boundaries. That is, for every BB where the live interval is defined or used, create a new interval that covers all the defs and uses in the BB. This is designed to eliminate one common problem: multiple reloads of the same value in a single basic block. Note, it does *not* decrease the number of spills since no copies are inserted so the split intervals are *connected* through spill and reloads (or rematerialization). The newly created intervals can be spilled again, in that case, since it does not span multiple basic blocks, it's spilled in the usual manner. However, it can reuse the same stack slot as the previously split interval. This is currently controlled by -split-intervals-at-bb. llvm-svn: 44198
* Adding debug output during coalescing.Bill Wendling2007-11-151-0/+1
| | | | llvm-svn: 44154
* Need to increment the iterator.Bill Wendling2007-11-151-1/+1
| | | | llvm-svn: 44153
* Refactor some code.Evan Cheng2007-11-121-3/+3
| | | | llvm-svn: 44010
* If an interval is being undone clear its preference as well since the source ↵Evan Cheng2007-11-041-1/+6
| | | | | | interval may have been undone as well. llvm-svn: 43670
* There are times when the coalescer would not coalesce away a copy but the copyEvan Cheng2007-11-031-9/+89
| | | | | | | | | | | | | | | | can be eliminated by the allocator is the destination and source targets the same register. The most common case is when the source and destination registers are in different class. For example, on x86 mov32to32_ targets GR32_ which contains a subset of the registers in GR32. The allocator can do 2 things: 1. Set the preferred allocation for the destination of a copy to that of its source. 2. After allocation is done, change the allocation of a copy destination (if legal) so the copy can be eliminated. This eliminates 443 extra moves from 403.gcc. llvm-svn: 43662
* Apply Chris' suggestions.Evan Cheng2007-10-171-1/+2
| | | | llvm-svn: 43069
* Clean up code that calculate MBB live-in's.Evan Cheng2007-10-171-17/+19
| | | | llvm-svn: 43061
* Some clean up.Evan Cheng2007-10-161-19/+10
| | | | llvm-svn: 43043
* Some clean up.Evan Cheng2007-10-121-3/+0
| | | | llvm-svn: 42898
* Pluggable coalescers inplementation.David Greene2007-09-061-1/+9
| | | | llvm-svn: 41743
* Re-implement trivial rematerialization. This allows def MIs whose live ↵Evan Cheng2007-08-131-18/+4
| | | | | | intervals that are coalesced to be rematerialized. llvm-svn: 41060
* Factor live variable analysis so it does not do register coalescingDavid Greene2007-06-081-0/+1
| | | | | | | | | | simultaneously. Move that pass to SimpleRegisterCoalescing. This makes it easier to implement alternative register allocation and coalescing strategies while maintaining reuse of the existing live interval analysis. llvm-svn: 37520
* Change names from RA to something unique to get rid of naming conflicts withBill Wendling2007-05-081-17/+19
| | | | | | certain linkers... llvm-svn: 36944
* Drop 'const'Devang Patel2007-05-031-2/+2
| | | | llvm-svn: 36662
* Use 'static const char' instead of 'static const int'.Devang Patel2007-05-021-2/+2
| | | | | | | Due to darwin gcc bug, one version of darwin linker coalesces static const int, which defauts PassID based pass identification. llvm-svn: 36652
* Do not use typeinfo to identify pass in pass manager.Devang Patel2007-05-011-0/+4
| | | | llvm-svn: 36632
* Match MachineFunction::UsedPhysRegs changes.Evan Cheng2007-04-251-6/+1
| | | | llvm-svn: 36452
* Clean up.Evan Cheng2007-04-251-4/+2
| | | | llvm-svn: 36431
* Copy coalescing change to prevent a physical register from being pin to aEvan Cheng2007-04-171-9/+22
| | | | | | | | | | | | | long live interval that has low usage density. 1. Change order of coalescing to join physical registers with virtual registers first before virtual register intervals become too long. 2. Check size and usage density to determine if it's worthwhile to join. 3. If joining is aborted, assign virtual register live interval allocation preference field to the physical register. 4. Register allocator should try to allocate to the preferred register first (if available) to create identify moves that can be eliminated. llvm-svn: 36218
* First cut trivial re-materialization support.Evan Cheng2007-03-201-4/+16
| | | | llvm-svn: 35208
* Only add liveinterval to livein set if it isn't assigned a stack slot.Evan Cheng2007-02-251-4/+4
| | | | llvm-svn: 34593
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-2/+3
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-191-3/+2
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Do not add livein's to entry MBB twice.Evan Cheng2007-02-171-2/+3
| | | | llvm-svn: 34382
* Add live-ins to every BB.Evan Cheng2007-02-161-0/+20
| | | | llvm-svn: 34342
* Eliminate static ctors from StatisticsChris Lattner2006-12-191-9/+6
| | | | llvm-svn: 32698
* Detemplatize the Statistic class. The only type it is instantiated withChris Lattner2006-12-061-2/+2
| | | | | | is 'unsigned'. llvm-svn: 32279
* eliminate fp statisticChris Lattner2006-12-061-3/+3
| | | | llvm-svn: 32251
* Unbreak VC++ build.Jeff Cohen2006-12-021-0/+1
| | | | llvm-svn: 32113
* Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. RemovesBill Wendling2006-11-171-29/+27
| | | | | | a #include of iostream. llvm-svn: 31800
* Remove redundant <cmath>.Jim Laskey2006-11-081-1/+0
| | | | llvm-svn: 31561
* Use correct value for float HUGH_VAL.Jim Laskey2006-11-071-2/+2
| | | | llvm-svn: 31500
* LinearScanner hotspot.Jim Laskey2006-10-241-3/+2
| | | | llvm-svn: 31153
* s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner2006-08-271-1/+1
| | | | llvm-svn: 29911
* Final polish on machine pass registries.Jim Laskey2006-08-021-1/+1
| | | | llvm-svn: 29471
* Introducing plugable register allocators and instruction schedulers.Jim Laskey2006-08-011-0/+5
| | | | llvm-svn: 29434
* Reduce number of exported symbolsAndrew Lenharth2006-07-201-2/+3
| | | | llvm-svn: 29220
* Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner2006-06-281-1/+2
| | | | llvm-svn: 28973
* If the register allocator cannot find a register to spill, try the aliases. IfEvan Cheng2006-05-121-2/+19
| | | | | | | that still fails (because all the register spill weights are inf), just grab one. llvm-svn: 28262
* Backing out previous check-in.Evan Cheng2006-05-111-16/+1
| | | | llvm-svn: 28219
* If the live interval legnth is essentially zero, i.e. in every live rangeEvan Cheng2006-05-101-1/+15
| | | | | | | the use follows def immediately, it doesn't make sense to spill it and hope it will be easier to allocate for this LI. llvm-svn: 28217
* Add some comments.Chris Lattner2006-03-251-0/+4
| | | | llvm-svn: 27133
* Code cleanups, no functionality changeChris Lattner2006-02-231-23/+10
| | | | llvm-svn: 26328
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
| | | | llvm-svn: 25515
* HB is *the* code janitor.Duraid Madina2005-12-281-0/+1
| | | | llvm-svn: 25031
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