| Commit message (Collapse) | Author | Age | Files | Lines |
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interval may have been undone as well.
llvm-svn: 43670
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can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.
The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
legal) so the copy can be eliminated.
This eliminates 443 extra moves from 403.gcc.
llvm-svn: 43662
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llvm-svn: 43069
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llvm-svn: 43061
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llvm-svn: 43043
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llvm-svn: 42898
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llvm-svn: 41743
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intervals that are coalesced to be rematerialized.
llvm-svn: 41060
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simultaneously. Move that pass to SimpleRegisterCoalescing.
This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.
llvm-svn: 37520
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certain linkers...
llvm-svn: 36944
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llvm-svn: 36662
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
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llvm-svn: 36632
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llvm-svn: 36452
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llvm-svn: 36431
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long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
first (if available) to create identify moves that can be eliminated.
llvm-svn: 36218
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llvm-svn: 35208
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llvm-svn: 34593
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llvm-svn: 34428
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Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
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llvm-svn: 34382
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llvm-svn: 34342
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llvm-svn: 32698
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is 'unsigned'.
llvm-svn: 32279
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llvm-svn: 32251
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llvm-svn: 32113
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a #include of iostream.
llvm-svn: 31800
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llvm-svn: 31561
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llvm-svn: 31500
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llvm-svn: 31153
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llvm-svn: 29911
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llvm-svn: 29471
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llvm-svn: 29434
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llvm-svn: 29220
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llvm-svn: 28973
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that still fails (because all the register spill weights are inf), just grab
one.
llvm-svn: 28262
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llvm-svn: 28219
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the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.
llvm-svn: 28217
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llvm-svn: 27133
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llvm-svn: 26328
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llvm-svn: 25515
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llvm-svn: 25031
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do it. :)
<_sabre_> excuses excuses
llvm-svn: 24471
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asserts.
llvm-svn: 24445
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llvm-svn: 23400
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This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll
llvm-svn: 23158
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Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting. This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now. This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.
On this program, on itanium, live intervals now takes 41% of llc time.
llvm-svn: 22986
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number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers. Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these). This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).
This reduces ppc llc compile time from 184s -> 172s on kc++. This is probably
worth FAR FAR more on itanium though.
llvm-svn: 22972
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we spill out of the fast path. The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs. This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.
llvm-svn: 22971
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add some comments. This loop really needs to be reevaluated!
llvm-svn: 22966
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