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* [regallocfast] Make sure the MachineRegisterInfo is aware of clobbers from aChad Rosier2012-11-061-0/+5
| | | | | | | register masks. This is an obvious and necessary fix for a soon to be committed patch. No test case possible at this time. Reviewed by Jakob. llvm-svn: 167498
* Change signature of function RAFast::spillAll to avoid conversion betweenAkira Hatanaka2012-10-311-2/+2
| | | | | | type MachineInstr* and MachineBasicBlock::iterator. llvm-svn: 167088
* Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen2012-10-171-23/+30
| | | | | | | | This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). llvm-svn: 166083
* Remove RegisterClassInfo::isReserved() and isAllocatable().Jakob Stoklund Olesen2012-10-151-4/+4
| | | | | | Clients can use the equivalent functions in MRI. llvm-svn: 165990
* Tidy up a few more uses of MF.getFunction()->getName().David Blaikie2012-08-221-2/+1
| | | | | | | | Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). llvm-svn: 162367
* Don't use getNextOperandForReg() in RAFast.Jakob Stoklund Olesen2012-08-081-8/+4
| | | | | | That particular optimization was probably premature anyway. llvm-svn: 161541
* Move RegisterClassInfo.h.Andrew Trick2012-06-061-1/+1
| | | | | | Allow targets to access this API. It's required for RegisterPressure. llvm-svn: 158102
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-6/+6
| | | | | | | | | | | | | No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
* Simplify some more getAliasSet callers.Jakob Stoklund Olesen2012-06-011-10/+6
| | | | | | MCRegAliasIterator can include Reg itself in the list. llvm-svn: 157848
* Don't access MO reference after invalidating operand list.Jakob Stoklund Olesen2012-05-141-2/+3
| | | | | | This should unbreak llvm-x86_64-linux. llvm-svn: 156778
* Fix PR12821.Jakob Stoklund Olesen2012-05-141-0/+6
| | | | | | | RAFast must add an <imp-def> operand when it is rewriting a sub-register def that isn't a read-modify-write. llvm-svn: 156777
* SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick2012-04-201-1/+1
| | | | | | | | | | | | | | | | | | | This nicely handles the most common case of virtual register sets, but also handles anticipated cases where we will map pointers to IDs. The goal is not to develop a completely generic SparseSet template. Instead we want to handle the expected uses within llvm without any template antics in the client code. I'm adding a bit of template nastiness here, and some assumption about expected usage in order to make the client code very clean. The expected common uses cases I'm designing for: - integer keys that need to be reindexed, and may map to additional data - densely numbered objects where we want pointer keys because no number->object map exists. llvm-svn: 155227
* Use uint16_t to store instruction implicit uses and defs. Reduces static data.Craig Topper2012-03-081-1/+1
| | | | llvm-svn: 152301
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-5/+5
| | | | llvm-svn: 152001
* 80 col.Jakob Stoklund Olesen2012-02-221-3/+5
| | | | llvm-svn: 151167
* Use SparseSet for the RAFast live virtual register map.Jakob Stoklund Olesen2012-02-221-73/+110
| | | | | | | | | | | | This makes RAFast 4% faster, and it gets rid of the dodgy DenseMap iteration. This also revealed that RAFast would sometimes dereference DenseMap iterators after erasing other elements from the map. That does seem to work in the current DenseMap implementation, but SparseSet doesn't allow it. llvm-svn: 151111
* Clear virtual registers after they are no longer referenced.Andrew Trick2012-02-211-0/+4
| | | | | | | | | | | | | Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. llvm-svn: 151032
* Transfer regmasks to MRI.Jakob Stoklund Olesen2012-02-171-3/+0
| | | | | | | | | MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. llvm-svn: 150830
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-101-6/+3
| | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
* Obvious unnecessary loop removal. Follow through from previous checkin.Andrew Trick2012-01-311-11/+10
| | | | llvm-svn: 149398
* RAFast: Generalize the logic for return operands.Andrew Trick2012-01-311-20/+59
| | | | | | | | This removes implicit assumption about the form of MI coming into regalloc. In particular, it should be independent of ProcessImplicitDefs which will eventually become a standard part of coming out of SSA--unless we simply can eliminate IMPLICIT_DEF completely. Current unit tests expose this once I remove incidental pass ordering restrictions. This is not a final fix. Just a temporary workaround until I figure out the right way. llvm-svn: 149360
* Freeze reserved registers before starting register allocation.Jakob Stoklund Olesen2012-01-051-0/+1
| | | | | | | | | | | The register allocators don't currently support adding reserved registers while they are running. Extend the MRI API to keep track of the set of reserved registers when register allocation started. Target hooks like hasFP() and needsStackRealignment() can look at this set to avoid reserving more registers during register allocation. llvm-svn: 147577
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-3/+3
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* If a register is both an early clobber and part of a tied use, handle the useRafael Espindola2011-11-221-7/+16
| | | | | | | | before the clobber so that we copy the value if needed. Fixes pr11415. llvm-svn: 145056
* Insert modified DBG_VALUE into LiveDbgValueMap. Devang Patel2011-11-151-1/+1
| | | | llvm-svn: 144696
* Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen2011-07-021-10/+4
| | | | | | | | asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ llvm-svn: 134310
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-7/+7
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* Print registers by name instead of by number.Jakob Stoklund Olesen2011-06-281-6/+7
| | | | llvm-svn: 134013
* After register is spilled there should not be any DBG_VALUE referring the ↵Devang Patel2011-06-211-1/+3
| | | | | | same register. llvm-svn: 133569
* There could be more than one DBG_VALUE instructions for variables where all ↵Devang Patel2011-06-211-4/+6
| | | | | | of them have offset based on one register. llvm-svn: 133560
* Be less aggressive about hinting in RAFast.Jakob Stoklund Olesen2011-06-131-7/+5
| | | | | | | | | | In particular, don't spill dirty registers only to satisfy a hint. It is not worth it. The attached test case provides an example where the fast allocator would spill a register when other registers are available. llvm-svn: 132900
* Avoid calling TRI->getAllocatableSet in RAFast.Jakob Stoklund Olesen2011-06-021-9/+4
| | | | | | | | | | | | | | When compiling a program with lots of small functions like 483.xalancbmk, this makes RAFast 11% faster. Add some comments to clarify the difference between unallocatable and reserved registers. It's quite subtle. The fast register allocator depends on EFLAGS' not being allocatable on x86. That way it can completely avoid tracking liveness, and it won't mind when there are multiple uses of a single def. llvm-svn: 132514
* Use RegisterClassInfo::getOrder in RAFast.Jakob Stoklund Olesen2011-06-021-10/+7
| | | | | | | This saves two virtual function calls and an Allocatable BitVector test, making RAFast run 2% faster. llvm-svn: 132471
* TypoEvan Cheng2011-04-221-1/+1
| | | | llvm-svn: 129970
* Fix a bug where we were counting the alias sets as completely usedEric Christopher2011-04-181-5/+0
| | | | | | | | | registers for fast allocation a different way. This has us updating used registers only when we're using that exact register. Fixes rdar://9207598 llvm-svn: 129711
* Temporarily revert r129408 to see if it brings the bots back.Eric Christopher2011-04-131-0/+2
| | | | llvm-svn: 129417
* Fix a bug where we were counting the alias sets as completely usedEric Christopher2011-04-121-2/+0
| | | | | | | | registers for fast allocation. Fixes rdar://9207598 llvm-svn: 129408
* Add more comments... err debug statements to the fast allocator.Eric Christopher2011-04-121-3/+16
| | | | llvm-svn: 129400
* Fix typo.Eric Christopher2011-04-121-1/+1
| | | | llvm-svn: 129334
* Mark that the return is using EAX so that we don't use it for some otherNick Lewycky2011-02-041-0/+21
| | | | | | purpose. Fixes PR9080! llvm-svn: 124903
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-101-4/+5
| | | | | | | | These functions not longer assert when passed 0, but simply return false instead. No functional change intended. llvm-svn: 123155
* Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong resultsJakob Stoklund Olesen2011-01-091-2/+1
| | | | | | | | | | | | | | | | | | when no virtual registers have been allocated. It was only used to resize IndexedMaps, so provide an IndexedMap::resize() method such that Map.grow(MRI.getLastVirtReg()); can be replaced with the simpler Map.resize(MRI.getNumVirtRegs()); This works correctly when no virtuals are allocated, and it bypasses the to/from index conversions. llvm-svn: 123130
* Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen2011-01-091-10/+10
| | | | | | | | | | without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. llvm-svn: 123107
* Fix comment.Eric Christopher2010-12-081-1/+1
| | | | llvm-svn: 121285
* Get rid of static constructors for pass registration. Instead, every pass ↵Owen Anderson2010-10-191-1/+4
| | | | | | | | | | | | | | | | | exposes an initializeMyPassFunction(), which must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize the pass's dependencies. Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h before parsing commandline arguments. I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass registration/creation, please send the testcase to me directly. llvm-svn: 116820
* Add DEBUG message.Devang Patel2010-09-101-2/+6
| | | | llvm-svn: 113614
* previous patch was a little too tricky for its own good. Don't try toJim Grosbach2010-09-031-8/+7
| | | | | | | | overload UserInInstr. Explicitly check Allocatable. The early exit in the condition will mean the performance impact of the extra test should be minimal. llvm-svn: 113016
* The register allocator shouldn't consider allocating reserved registers.Jim Grosbach2010-09-011-3/+7
| | | | llvm-svn: 112728
* tidy up a few 80-column and trailing whitespace bits.Jim Grosbach2010-09-011-16/+19
| | | | llvm-svn: 112726
* Ignore unallocatable registers in RegAllocFast.Jakob Stoklund Olesen2010-08-311-1/+2
| | | | llvm-svn: 112632
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