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* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* While spilling live registers at the end of block check whether they are ↵Devang Patel2010-08-041-1/+24
| | | | | | used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack. llvm-svn: 110235
* Fix a bug in the -regalloc=fast handling of exotic two-address instruction withJakob Stoklund Olesen2010-07-291-3/+11
| | | | | | | | | | | | | | | | | multiple defs, like t2LDRSB_POST. The first def could accidentally steal the physreg that the second, tied def was required to be allocated to. Now, the tied use-def is treated more like an early clobber, and the physreg is reserved before allocating the other defs. This would never be a problem when the tied def was the only def which is the usual case. This fixes MallocBench/gs for thumb2 -O0. llvm-svn: 109715
* Fix memory leak reported by valgrind. Devang Patel2010-07-191-23/+31
| | | | | | Do not visit operands of old instruction. Visit all operands of new instruction. llvm-svn: 108767
* Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen2010-07-161-6/+2
| | | | | | TII::isMoveInstr is going tobe completely removed. llvm-svn: 108507
* Update DBG_VALUE to refer appropriate stack slot in case of a spill.Devang Patel2010-07-091-2/+19
| | | | llvm-svn: 108023
* Detect and handle COPY in many places.Jakob Stoklund Olesen2010-07-031-3/+10
| | | | | | | This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. llvm-svn: 107547
* Fix the handling of partial redefines in the fast register allocator.Jakob Stoklund Olesen2010-06-291-17/+39
| | | | | | | | | | | A partial redefine needs to be treated like a tied operand, and the register must be reloaded while processing use operands. This fixes a bug where partially redefined registers were processed as normal defs with a reload added. The reload could clobber another use operand if it was a kill that allowed register reuse. llvm-svn: 107193
* Add more special treatment for inline asm in RegAllocFast.Jakob Stoklund Olesen2010-06-281-21/+107
| | | | | | | | | | | | When an instruction has tied operands and physreg defines, we must take extra care that the tied operands conflict with neither physreg defs nor uses. The special treatment is given to inline asm and instructions with tied operands / early clobbers and physreg defines. This fixes PR7509. llvm-svn: 107043
* Avoid processing early clobbers twice in RegAllocFast.Jakob Stoklund Olesen2010-06-151-3/+8
| | | | | | | | | Early clobbers defining a virtual register were first alocated to a physreg and then processed as a physreg EC, spilling the virtreg. This fixes PR7382. llvm-svn: 105998
* Keep track of the call instructions whose clobber lists were skipped during fastJakob Stoklund Olesen2010-06-041-0/+17
| | | | | | | | | | | register allocation. Process all of the clobber lists at the end of the function, marking the registers as used in MachineRegisterInfo. This is necessary in case the calls clobber callee-saved registers (sic). llvm-svn: 105473
* Add support for partial redefs to the fast register allocator.Jakob Stoklund Olesen2010-05-191-20/+18
| | | | | | | | | | A partial redef now triggers a reload if required. Also don't add <imp-def,dead> operands for physical superregisters. Kill flags are still treated as full register kills, and <imp-use,kill> operands are added for physical superregisters as before. llvm-svn: 104167
* Properly handle multiple definitions of a virtual register in the sameJakob Stoklund Olesen2010-05-181-21/+41
| | | | | | | | | | | | | | | instruction. This can happen on ARM: >> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0 Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031* Killing last use: %reg1028 Allocating %reg1035 from QPR Assigning %reg1035 to Q1 << %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def> llvm-svn: 104056
* Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.Jakob Stoklund Olesen2010-05-171-5/+5
| | | | | | | This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod. Clang now successfully self hosts in a debug build with the fast register allocator. llvm-svn: 103975
* Remove debug option. Add comment on spill order determinism.Jakob Stoklund Olesen2010-05-171-7/+4
| | | | llvm-svn: 103961
* Avoid allocating the same physreg to multiple virtregs in one instruction.Jakob Stoklund Olesen2010-05-171-0/+1
| | | | | | | | | While that approach works wonders for register pressure, it tends to break everything. This should unbreak the arm-linux builder and fix a number of miscompilations. llvm-svn: 103946
* Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.Jakob Stoklund Olesen2010-05-171-8/+7
| | | | llvm-svn: 103940
* Extract spill cost calculation to a new method, and use definePhysReg() to clearJakob Stoklund Olesen2010-05-171-86/+64
| | | | | | | | | | out aliases when allocating. Clean up allocVirtReg(). Use calcSpillCost() to allow more aggressive hinting. Now the hint is always taken unless blocked by a reserved register. This leads to more coalescing, lower register pressure, and less spilling. llvm-svn: 103939
* Only use clairvoyance when defining a register, and then only if it has one use.Jakob Stoklund Olesen2010-05-171-16/+11
| | | | | | This makes allocation independent on the ordering of use-def chains. llvm-svn: 103935
* Eliminate a hash table probe when killing virtual registers.Jakob Stoklund Olesen2010-05-171-15/+20
| | | | llvm-svn: 103934
* Execute virtreg kills immediately instead of after processing all uses.Jakob Stoklund Olesen2010-05-171-19/+16
| | | | | | This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one. llvm-svn: 103933
* Sprinkle superregister <imp-def> and <imp-kill> operands when dealing with ↵Jakob Stoklund Olesen2010-05-171-10/+28
| | | | | | subregister indices. llvm-svn: 103931
* Now that we don't keep live registers across calls, there is not reason to goJakob Stoklund Olesen2010-05-171-7/+12
| | | | | | | through the very long list of call-clobbered registers. We just assume all registers are clobbered. llvm-svn: 103930
* Boldly attempt consistent capitalization. Functional changes unintended.Jakob Stoklund Olesen2010-05-171-42/+42
| | | | llvm-svn: 103929
* Spill and kill all virtual registers across a call.Jakob Stoklund Olesen2010-05-171-56/+28
| | | | | | Debug code doesn't use callee saved registers anyway, and the code is simpler this way. Now spillVirtReg always kills, and the isKill parameter is not needed. llvm-svn: 103927
* Reduce hashtable probes by using DenseMap::insert() for lookup.Jakob Stoklund Olesen2010-05-171-48/+46
| | | | llvm-svn: 103926
* Make MBB a class member instead of passing it around everywhere.Jakob Stoklund Olesen2010-05-171-62/+62
| | | | llvm-svn: 103925
* Fix an GCC warning that seems to have actually caught a bug (!!!) inChandler Carruth2010-05-151-2/+2
| | | | | | | | a condition's grouping. Every other use of Allocatable.test(Hint) groups it the same way as it is indented, so move the parentheses to agree with that grouping. llvm-svn: 103869
* Calculate liveness on the fly for local registers.Jakob Stoklund Olesen2010-05-151-0/+31
| | | | | | | | When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty. This makes the fast allocator independent of incoming kill flags. llvm-svn: 103866
* Don't bother spilling before a returnJakob Stoklund Olesen2010-05-141-4/+13
| | | | llvm-svn: 103831
* Track allocatable instead of reserved regs, and never take an unallocatable ↵Jakob Stoklund Olesen2010-05-141-8/+10
| | | | | | hint. llvm-svn: 103828
* Avoid scanning the long tail of physreg operands on callsJakob Stoklund Olesen2010-05-141-4/+9
| | | | llvm-svn: 103823
* Count coalesced copiesJakob Stoklund Olesen2010-05-141-0/+2
| | | | llvm-svn: 103821
* Allow virtreg redefines when verifying for RegAllocFastJakob Stoklund Olesen2010-05-141-1/+1
| | | | llvm-svn: 103820
* When verifying two-address instructions, check the following:Jakob Stoklund Olesen2010-05-141-0/+5
| | | | | | | | | - Kill is implicit when use and def registers are identical. - Only virtual registers can differ. Add a -verify-fast-regalloc to run the verifier before the fast allocator. llvm-svn: 103797
* Simplify the handling of physreg defs and uses in RegAllocFast.Jakob Stoklund Olesen2010-05-141-109/+72
| | | | | | | This adds extra security against using clobbered physregs, and it adds kill markers to physreg uses. llvm-svn: 103784
* Enable opportunistic coalescingJakob Stoklund Olesen2010-05-141-7/+18
| | | | llvm-svn: 103764
* Trust kill flags from isel and later passes.Jakob Stoklund Olesen2010-05-141-4/+0
| | | | llvm-svn: 103748
* Fix an embarrassing runtime regression for RegAllocFast.Jakob Stoklund Olesen2010-05-141-9/+31
| | | | | | | | | | | | This loop is quadratic in the capacity for a DenseMap: while(!map.empty()) map.erase(map.begin()); Instead we now do a normal begin() - end() iteration followed by map.clear(). That also has the nice sideeffect of shrinking the map capacity on demand. llvm-svn: 103747
* Clean up RegAllocFast debug outputJakob Stoklund Olesen2010-05-131-15/+14
| | | | llvm-svn: 103739
* Take allocation hints from copy instructions to/from physregs.Jakob Stoklund Olesen2010-05-131-18/+68
| | | | | | This causes way more identity copies to be generated, ripe for coalescing. llvm-svn: 103686
* More asserts around physreg usesJakob Stoklund Olesen2010-05-131-1/+11
| | | | llvm-svn: 103685
* Make sure to add kill flags to the last use of a virtreg when it is redefined.Jakob Stoklund Olesen2010-05-121-12/+22
| | | | | | The X86 floating point stack pass and others depend on good kill flags. llvm-svn: 103635
* Avoid scoping issues, fix buildbotsJakob Stoklund Olesen2010-05-121-20/+21
| | | | llvm-svn: 103530
* Make Clang happy.Daniel Dunbar2010-05-111-3/+3
| | | | llvm-svn: 103528
* Store the Dirty bit in the LiveReg structure instead of a bit vector.Jakob Stoklund Olesen2010-05-111-34/+28
| | | | llvm-svn: 103522
* Keep track of the last place a live virtreg was used.Jakob Stoklund Olesen2010-05-111-72/+118
| | | | | | | This allows us to add accurate kill markers, something the scavenger likes. Add some more tests from ARM that needed this. llvm-svn: 103521
* Simplify the tracking of used physregs to a bulk bitor followed by a transitiveJakob Stoklund Olesen2010-05-111-4/+9
| | | | | | | | closure after allocating all blocks. Add a few more test cases for -regalloc=fast. llvm-svn: 103500
* Mostly rewrite RegAllocFast.Jakob Stoklund Olesen2010-05-111-700/+469
| | | | | | | | | | | | | | | | | | Sorry for the big change. The path leading up to this patch had some TableGen changes that I didn't want to commit before I knew they were useful. They weren't, and this version does not need them. The fast register allocator now does no liveness calculations. Instead it relies on kill flags provided by isel. (Currently those kill flags are also ignored due to isel bugs). The allocation algorithm is supposed to work with any subset of valid kill flags. More kill flags simply means fewer spills inserted. Registers are allocated from a working set that contains no aliases. That means most allocations can be done directly without expensive alias checks. When the working set runs out of registers we do the full alias check to find new free registers. llvm-svn: 103488
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