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path: root/llvm/lib/CodeGen/RegAllocBasic.cpp
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* Make data structures private.Jakob Stoklund Olesen2012-01-111-3/+3
| | | | llvm-svn: 147979
* Sink spillInterferences into RABasic.Jakob Stoklund Olesen2012-01-111-0/+62
| | | | | | This helper method is too simplistic for RAGreedy. llvm-svn: 147976
* Move RegAllocBase into its own cpp file separate from RABasic.Jakob Stoklund Olesen2012-01-111-312/+1
| | | | | | No functional change. llvm-svn: 147972
* Freeze reserved registers before starting register allocation.Jakob Stoklund Olesen2012-01-051-0/+1
| | | | | | | | | | | The register allocators don't currently support adding reserved registers while they are running. Extend the MRI API to keep track of the set of reserved registers when register allocation started. Target hooks like hasFP() and needsStackRealignment() can look at this set to avoid reserving more registers during register allocation. llvm-svn: 147577
* Privatize an unused part of the LiveIntervalUnion::Query interface.Jakob Stoklund Olesen2011-08-111-1/+2
| | | | | | No clients are iterating over interference overlaps. llvm-svn: 137350
* Refer to the RegisterCoalescer pass by ID.Jakob Stoklund Olesen2011-08-091-2/+1
| | | | | | | A public interface is no longer needed since RegisterCoalescer is not an analysis any more. llvm-svn: 137082
* Print out the MBB live-in registers.Jakob Stoklund Olesen2011-07-261-0/+4
| | | | llvm-svn: 136178
* Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen2011-07-021-12/+14
| | | | | | | | asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ llvm-svn: 134310
* There is only one register coalescer. Merge it into the base class andRafael Espindola2011-06-261-1/+1
| | | | | | remove the analysis group. llvm-svn: 133899
* Move RegisterCoalescer.h to lib/CodeGen.Rafael Espindola2011-06-261-1/+1
| | | | llvm-svn: 133895
* Switch AllocationOrder to using RegisterClassInfo instead of a BitVectorJakob Stoklund Olesen2011-06-031-12/+7
| | | | | | | | | of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. llvm-svn: 132581
* Fix PR9883. Make sure all caches are invalidated when a live range is repaired.Jakob Stoklund Olesen2011-05-101-1/+1
| | | | | | | | The previous invalidation missed the alias interference caches. Also add a stats counter for the number of repaired ranges. llvm-svn: 131133
* Emit a proper error message when register allocators run out of registers.Jakob Stoklund Olesen2011-05-061-0/+20
| | | | | | | This can't be just an assertion, users can always write impossible inline assembly. Such an assembly statement should be included in the error message. llvm-svn: 131024
* Prefer cheap registers for busy live ranges.Jakob Stoklund Olesen2011-04-201-0/+1
| | | | | | | | | | | | | | On the x86-64 and thumb2 targets, some registers are more expensive to encode than others in the same register class. Add a CostPerUse field to the TableGen register description, and make it available from TRI->getCostPerUse. This represents the cost of a REX prefix or a 32-bit instruction encoding required by choosing a high register. Teach the greedy register allocator to prefer cheap registers for busy live ranges (as indicated by spill weight). llvm-svn: 129864
* Fix a bug in RegAllocBase::addMBBLiveIns() where a basic block could ↵Jakob Stoklund Olesen2011-04-121-1/+1
| | | | | | accidentally be skipped. llvm-svn: 129373
* Reuse live interval union between functions. This saves a bit of compile timeJakob Stoklund Olesen2011-04-111-4/+8
| | | | | | when compiling many small functions. llvm-svn: 129321
* Use a faster algorithm for computing MBB live-in registers after register ↵Jakob Stoklund Olesen2011-04-111-18/+20
| | | | | | | | allocation. LiveIntervals::findLiveInMBBs has to do a full binary search for each segment. llvm-svn: 129292
* Time the initial seeding of live registersJakob Stoklund Olesen2011-04-111-0/+1
| | | | llvm-svn: 129276
* Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.Jakob Stoklund Olesen2011-04-051-0/+7
| | | | llvm-svn: 128935
* The basic register allocator must also use the inline spiller.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | It is using a trivial rewriter that doesn't know how to insert spill code requested by the standard spiller. llvm-svn: 128688
* Allow the allocation of empty live ranges that have uses.Jakob Stoklund Olesen2011-03-231-1/+8
| | | | | | Empty ranges may represent undef values. llvm-svn: 128144
* Tag cached interference with a user-provided tag instead of the virtual ↵Jakob Stoklund Olesen2011-03-161-0/+3
| | | | | | | | | register number. The live range of a virtual register may change which invalidates the cached interference information. llvm-svn: 127772
* Spill multiple registers at once.Jakob Stoklund Olesen2011-03-121-0/+7
| | | | | | | | | | | Live range splitting can create a number of small live ranges containing only a single real use. Spill these small live ranges along with the large range they are connected to with copies. This enables memory operand folding and maximizes the spill to fill distance. Work in progress with known bugs. llvm-svn: 127529
* Change the Spiller interface to take a LiveRangeEdit reference.Jakob Stoklund Olesen2011-03-101-2/+5
| | | | | | | This makes it possible to register delegates and get callbacks when the spiller edits live ranges. llvm-svn: 127389
* Make SpillIs an optional pointer. Avoid creating a bunch of temporary ↵Jakob Stoklund Olesen2011-03-101-4/+2
| | | | | | SmallVectors. llvm-svn: 127388
* Change the RAGreedy register assignment order so large live ranges are ↵Jakob Stoklund Olesen2011-02-221-23/+37
| | | | | | | | | | | | | | allocated first. This is based on the observation that long live ranges are more difficult to allocate, so there is a better chance of solving the puzzle by handling the big pieces first. The allocator will evict and split long alive ranges when they get in the way. RABasic is still using spill weights for its priority queue, so the interface to the queue has been virtualized. llvm-svn: 126259
* Add VirtRegMap::rewrite() and use it in the new register allocators.Jakob Stoklund Olesen2011-02-181-3/+1
| | | | | | | | | | The rewriter works almost identically to -rewriter=trivial, except it also eliminates any identity copies. This makes the new register allocators independent of VirtRegRewriter.cpp which will be going away at the same time as RegAllocLinearScan. llvm-svn: 125967
* Trim debugging output.Jakob Stoklund Olesen2011-02-181-4/+6
| | | | llvm-svn: 125802
* Add basic register allocator statistics.Jakob Stoklund Olesen2011-02-171-0/+8
| | | | llvm-svn: 125789
* Evict a lighter single interference before attempting to split a live range.Jakob Stoklund Olesen2011-02-091-7/+14
| | | | | | | | | | | | | | Registers are not allocated strictly in spill weight order when live range splitting and spilling has created new shorter intervals with higher spill weights. When one of the new heavy intervals conflicts with a single lighter interval, simply evict the old interval instead of trying to split the heavy one. The lighter interval is a better candidate for splitting, it has a smaller use density. llvm-svn: 125151
* Pass a Banner argument to the machine code verifier both fromJakob Stoklund Olesen2010-12-181-1/+1
| | | | | | | | createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. llvm-svn: 122113
* Make the -verify-regalloc command line option available to base classes asJakob Stoklund Olesen2010-12-171-4/+5
| | | | | | | | RegAllocBase::VerifyEnabled. Run the machine code verifier in a few interesting places during RegAllocGreedy. llvm-svn: 122107
* Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.Jakob Stoklund Olesen2010-12-141-14/+4
| | | | llvm-svn: 121801
* Use TRI::printReg instead of AbstractRegisterDescription when printingJakob Stoklund Olesen2010-12-141-10/+1
| | | | | | LiveIntervalUnions. llvm-svn: 121781
* Add named timer groups for the different stages of register allocation.Jakob Stoklund Olesen2010-12-111-0/+5
| | | | llvm-svn: 121604
* Move MRI into RegAllocBase. Clean up debug output a bit.Jakob Stoklund Olesen2010-12-101-15/+8
| | | | llvm-svn: 121599
* Added register reassignment prototype to RAGreedy. It's a simpleAndrew Trick2010-12-091-3/+1
| | | | | | | heuristic to reshuffle register assignments when we can't find an available reg. llvm-svn: 121388
* Store (priority,regnum) pairs in the priority queue instead of providing anJakob Stoklund Olesen2010-12-081-46/+17
| | | | | | | | | | | | | | | | | | | | | | | abstract priority queue interface in subclasses that want to override the priority calculations. Subclasses must provide a getPriority() implementation instead. This approach requires less code as long as priorities are expressable as simple floats, and it avoids the dangers of defining potentially expensive priority comparison functions. It also should speed up priority_queue operations since they no longer have to chase pointers when comparing registers. This is not measurable, though. Preferably, we shouldn't use floats to guide code generation. The use of floats here is derived from the use of floats for spill weights. Spill weights have a dynamic range that doesn't lend itself easily to a fixpoint implementation. When someone invents a stable spill weight representation, it can be reused for allocation priorities. llvm-svn: 121294
* Move RABasic::addMBBLiveIns to the base class, it is generally useful.Jakob Stoklund Olesen2010-12-081-33/+31
| | | | | | | Minor optimization to the use of IntervalMap iterators. They are fairly heavyweight, so prefer SI.valid() over SI != end(). llvm-svn: 121217
* Switch LiveIntervalUnion from std::set to IntervalMap.Jakob Stoklund Olesen2010-12-071-9/+17
| | | | | | | This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes way faster. llvm-svn: 121201
* Simplify assertion.Jakob Stoklund Olesen2010-12-071-9/+2
| | | | llvm-svn: 121162
* Coding style. No significant functionality. Abandon linear scan styleAndrew Trick2010-11-301-238/+232
| | | | | | | | in favor of the widespread llvm style. Capitalize variables and add newlines for visual parsing. Rename variables for readability. And other cleanup. llvm-svn: 120490
* Namespacify.Benjamin Kramer2010-11-251-2/+2
| | | | llvm-svn: 120146
* RABasic fix. Regalloc is responsible for updating block live ins.Andrew Trick2010-11-201-0/+30
| | | | llvm-svn: 119896
* Whitespace.Andrew Trick2010-11-201-20/+20
| | | | llvm-svn: 119895
* Check TRI->getReservedRegs because other allocators do it. Even thoughAndrew Trick2010-11-111-35/+42
| | | | | | | | it makes no sense for allocation_order iterators to visit reserved regs. The inline spiller depends on AliasAnalysis. Manage the Query state to avoid uninitialized or stale results. llvm-svn: 118800
* RABasic is nearly functionally complete. There are a few remainingAndrew Trick2010-11-101-61/+99
| | | | | | | | | benchmarks hitting an assertion. Adds LiveIntervalUnion::collectInterferingVRegs. Fixes "late spilling" by checking for any unspillable live vregs among all physReg aliases. llvm-svn: 118701
* Adds RABasic verification and tracing.Andrew Trick2010-11-091-9/+85
| | | | | | (retry now that the windows build is green) llvm-svn: 118630
* Reverting r118604. Windows build broke.Andrew Trick2010-11-091-85/+9
| | | | llvm-svn: 118613
* Adds RABasic verification and tracing.Andrew Trick2010-11-091-9/+85
| | | | llvm-svn: 118604
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