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path: root/llvm/lib/CodeGen/RegAllocBasic.cpp
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* Tidy up a few more uses of MF.getFunction()->getName().David Blaikie2012-08-221-2/+1
| | | | | | | | Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). llvm-svn: 162367
* Remove the RenderMachineFunction HTML output pass.Jakob Stoklund Olesen2012-06-201-13/+0
| | | | | | | I don't think anyone has been using this functionality for a while, and it is getting in the way of refactoring now. llvm-svn: 158876
* Remove LiveIntervalUnions from RegAllocBase.Jakob Stoklund Olesen2012-06-201-3/+3
| | | | | | They are living in LiveRegMatrix now. llvm-svn: 158868
* Convert RABasic to using LiveRegMatrix interference checking.Jakob Stoklund Olesen2012-06-201-68/+51
| | | | | | | Stop using the LiveIntervalUnions provided by RegAllocBase, they will be removed soon. llvm-svn: 158866
* Guard private fields that are unused in Release builds with #ifndef NDEBUG.Benjamin Kramer2012-06-161-0/+2
| | | | llvm-svn: 158608
* Remove final verification in RABasic.Jakob Stoklund Olesen2012-06-151-20/+0
| | | | | | | We now have a proper machine code verifier pass between register allocation and rewriting. llvm-svn: 158577
* Also compute MBB live-in lists in the new rewriter pass.Jakob Stoklund Olesen2012-06-091-2/+0
| | | | | | | | | This deduplicates some code from the optimizing register allocators, and it means that it is now possible to change the register allocators' solutions simply by editing the VirtRegMap between the register allocator pass and the rewriter. llvm-svn: 158249
* Reintroduce VirtRegRewriter.Jakob Stoklund Olesen2012-06-081-11/+1
| | | | | | | | | | | | | | | | | | OK, not really. We don't want to reintroduce the old rewriter hacks. This patch extracts virtual register rewriting as a separate pass that runs after the register allocator. This is possible now that CodeGen/Passes.cpp can configure the full optimizing register allocator pipeline. The rewriter pass uses register assignments in VirtRegMap to rewrite virtual registers to physical registers, and it inserts kill flags based on live intervals. These finalization steps are the same for the optimizing register allocators: RABasic, RAGreedy, and PBQP. llvm-svn: 158244
* Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer2012-06-061-1/+0
| | | | | | | | There are some that I didn't remove this round because they looked like obvious stubs. There are dead variables in gtest too, they should be fixed upstream. llvm-svn: 158090
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-4/+4
| | | | | | | | | | | | | No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
* Allow LiveRangeEdit to be created with a NULL parent.Jakob Stoklund Olesen2012-05-191-2/+2
| | | | | | The dead code elimination with callbacks is still useful. llvm-svn: 157100
* Moved LiveRangeEdit.h so that it can be called from other parts of the ↵Pete Cooper2012-04-021-1/+1
| | | | | | backend, not just libCodeGen llvm-svn: 153906
* Refactored the LiveRangeEdit interface so that MachineFunction, ↵Pete Cooper2012-04-021-2/+2
| | | | | | TargetInstrInfo, MachineRegisterInfo, LiveIntervals, and VirtRegMap are all passed into the constructor and stored as members instead of passed in to each method. llvm-svn: 153903
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-2/+2
| | | | llvm-svn: 152001
* Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. TheseLang Hames2012-02-281-1/+1
| | | | | | | | methods are no longer needed now that LinearScan has gone away. (Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs). llvm-svn: 151658
* Clear virtual registers after they are no longer referenced.Andrew Trick2012-02-211-1/+4
| | | | | | | | | | | | | Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. llvm-svn: 151032
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-101-4/+0
| | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
* Add Register mask support to RABasic.Jakob Stoklund Olesen2012-02-081-0/+14
| | | | | | | When a virtual register is live across a call, limit the search space to call-preserved registers. llvm-svn: 150081
* Renamed MachineScheduler to ScheduleTopDownLive.Andrew Trick2012-01-171-1/+1
| | | | | | Responding to code review. llvm-svn: 148290
* Moving options declarations around.Andrew Trick2012-01-171-2/+0
| | | | | | More short term hackery until we have a way to configure passes that work on LiveIntervals. llvm-svn: 148289
* Added the MachineSchedulerPass skeleton.Andrew Trick2012-01-131-0/+3
| | | | llvm-svn: 148105
* Make data structures private.Jakob Stoklund Olesen2012-01-111-3/+3
| | | | llvm-svn: 147979
* Sink spillInterferences into RABasic.Jakob Stoklund Olesen2012-01-111-0/+62
| | | | | | This helper method is too simplistic for RAGreedy. llvm-svn: 147976
* Move RegAllocBase into its own cpp file separate from RABasic.Jakob Stoklund Olesen2012-01-111-312/+1
| | | | | | No functional change. llvm-svn: 147972
* Freeze reserved registers before starting register allocation.Jakob Stoklund Olesen2012-01-051-0/+1
| | | | | | | | | | | The register allocators don't currently support adding reserved registers while they are running. Extend the MRI API to keep track of the set of reserved registers when register allocation started. Target hooks like hasFP() and needsStackRealignment() can look at this set to avoid reserving more registers during register allocation. llvm-svn: 147577
* Privatize an unused part of the LiveIntervalUnion::Query interface.Jakob Stoklund Olesen2011-08-111-1/+2
| | | | | | No clients are iterating over interference overlaps. llvm-svn: 137350
* Refer to the RegisterCoalescer pass by ID.Jakob Stoklund Olesen2011-08-091-2/+1
| | | | | | | A public interface is no longer needed since RegisterCoalescer is not an analysis any more. llvm-svn: 137082
* Print out the MBB live-in registers.Jakob Stoklund Olesen2011-07-261-0/+4
| | | | llvm-svn: 136178
* Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen2011-07-021-12/+14
| | | | | | | | asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ llvm-svn: 134310
* There is only one register coalescer. Merge it into the base class andRafael Espindola2011-06-261-1/+1
| | | | | | remove the analysis group. llvm-svn: 133899
* Move RegisterCoalescer.h to lib/CodeGen.Rafael Espindola2011-06-261-1/+1
| | | | llvm-svn: 133895
* Switch AllocationOrder to using RegisterClassInfo instead of a BitVectorJakob Stoklund Olesen2011-06-031-12/+7
| | | | | | | | | of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. llvm-svn: 132581
* Fix PR9883. Make sure all caches are invalidated when a live range is repaired.Jakob Stoklund Olesen2011-05-101-1/+1
| | | | | | | | The previous invalidation missed the alias interference caches. Also add a stats counter for the number of repaired ranges. llvm-svn: 131133
* Emit a proper error message when register allocators run out of registers.Jakob Stoklund Olesen2011-05-061-0/+20
| | | | | | | This can't be just an assertion, users can always write impossible inline assembly. Such an assembly statement should be included in the error message. llvm-svn: 131024
* Prefer cheap registers for busy live ranges.Jakob Stoklund Olesen2011-04-201-0/+1
| | | | | | | | | | | | | | On the x86-64 and thumb2 targets, some registers are more expensive to encode than others in the same register class. Add a CostPerUse field to the TableGen register description, and make it available from TRI->getCostPerUse. This represents the cost of a REX prefix or a 32-bit instruction encoding required by choosing a high register. Teach the greedy register allocator to prefer cheap registers for busy live ranges (as indicated by spill weight). llvm-svn: 129864
* Fix a bug in RegAllocBase::addMBBLiveIns() where a basic block could ↵Jakob Stoklund Olesen2011-04-121-1/+1
| | | | | | accidentally be skipped. llvm-svn: 129373
* Reuse live interval union between functions. This saves a bit of compile timeJakob Stoklund Olesen2011-04-111-4/+8
| | | | | | when compiling many small functions. llvm-svn: 129321
* Use a faster algorithm for computing MBB live-in registers after register ↵Jakob Stoklund Olesen2011-04-111-18/+20
| | | | | | | | allocation. LiveIntervals::findLiveInMBBs has to do a full binary search for each segment. llvm-svn: 129292
* Time the initial seeding of live registersJakob Stoklund Olesen2011-04-111-0/+1
| | | | llvm-svn: 129276
* Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.Jakob Stoklund Olesen2011-04-051-0/+7
| | | | llvm-svn: 128935
* The basic register allocator must also use the inline spiller.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | It is using a trivial rewriter that doesn't know how to insert spill code requested by the standard spiller. llvm-svn: 128688
* Allow the allocation of empty live ranges that have uses.Jakob Stoklund Olesen2011-03-231-1/+8
| | | | | | Empty ranges may represent undef values. llvm-svn: 128144
* Tag cached interference with a user-provided tag instead of the virtual ↵Jakob Stoklund Olesen2011-03-161-0/+3
| | | | | | | | | register number. The live range of a virtual register may change which invalidates the cached interference information. llvm-svn: 127772
* Spill multiple registers at once.Jakob Stoklund Olesen2011-03-121-0/+7
| | | | | | | | | | | Live range splitting can create a number of small live ranges containing only a single real use. Spill these small live ranges along with the large range they are connected to with copies. This enables memory operand folding and maximizes the spill to fill distance. Work in progress with known bugs. llvm-svn: 127529
* Change the Spiller interface to take a LiveRangeEdit reference.Jakob Stoklund Olesen2011-03-101-2/+5
| | | | | | | This makes it possible to register delegates and get callbacks when the spiller edits live ranges. llvm-svn: 127389
* Make SpillIs an optional pointer. Avoid creating a bunch of temporary ↵Jakob Stoklund Olesen2011-03-101-4/+2
| | | | | | SmallVectors. llvm-svn: 127388
* Change the RAGreedy register assignment order so large live ranges are ↵Jakob Stoklund Olesen2011-02-221-23/+37
| | | | | | | | | | | | | | allocated first. This is based on the observation that long live ranges are more difficult to allocate, so there is a better chance of solving the puzzle by handling the big pieces first. The allocator will evict and split long alive ranges when they get in the way. RABasic is still using spill weights for its priority queue, so the interface to the queue has been virtualized. llvm-svn: 126259
* Add VirtRegMap::rewrite() and use it in the new register allocators.Jakob Stoklund Olesen2011-02-181-3/+1
| | | | | | | | | | The rewriter works almost identically to -rewriter=trivial, except it also eliminates any identity copies. This makes the new register allocators independent of VirtRegRewriter.cpp which will be going away at the same time as RegAllocLinearScan. llvm-svn: 125967
* Trim debugging output.Jakob Stoklund Olesen2011-02-181-4/+6
| | | | llvm-svn: 125802
* Add basic register allocator statistics.Jakob Stoklund Olesen2011-02-171-0/+8
| | | | llvm-svn: 125789
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