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* Factory methods for function passes now return type FunctionPass *.Brian Gaeke2003-08-141-1/+1
| | | | llvm-svn: 7839
* For instructions in a delay slot of another instruction,Vikram S. Adve2003-08-121-12/+16
| | | | | | | | we no longer need to find the live-before set of the delayed branch since that set is now included the live-before/after set of the instructions in each delay slot. Just assert that instead. llvm-svn: 7796
* Use a new local data structure instead of the MachineInstr::regsUsed setChris Lattner2003-08-051-8/+7
| | | | llvm-svn: 7621
* Add a mapChris Lattner2003-08-051-0/+4
| | | | llvm-svn: 7620
* Minor cleanupsChris Lattner2003-08-051-23/+22
| | | | llvm-svn: 7619
* Physical registers no longer live in the regsUsed set for each machine instrChris Lattner2003-08-051-18/+30
| | | | llvm-svn: 7618
* 1. Bug fix: Don't use branch operand reg. as temp. reg. whenVikram S. Adve2003-07-291-81/+326
| | | | | | | | | | | spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). 2. Bug fix: Delete the delay slot instr, not the branch instr, when moving delay slot instr. out!!!! 3. Move code to insert caller-saves moved here from SparcRegInfo: it is now machine-independent. llvm-svn: 7389
* Add const version of getLiveRangeForValue().Vikram S. Adve2003-07-291-4/+9
| | | | llvm-svn: 7386
* Code to insert caller-saves moved here from SparcRegInfo: it is nowVikram S. Adve2003-07-291-9/+22
| | | | | | | | | machine-independent. Fix problem with using branch operand reg. as temp. reg. when spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). llvm-svn: 7385
* Making this code const-correct would be a pain, so I'll hack it.Chris Lattner2003-07-261-1/+1
| | | | llvm-svn: 7350
* Remove extraneous #includesChris Lattner2003-07-261-1/+1
| | | | llvm-svn: 7341
* (1) Change the way unused regs. are marked and found to consider regTypeVikram S. Adve2003-07-254-116/+134
| | | | | | | | | | | info (since multiple reg types may share the same reg class). (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. llvm-svn: 7329
* Remove unused field. Change the way unused regs. are marked andVikram S. Adve2003-07-251-10/+11
| | | | | | | found to consider regType info (since multiple reg types may share the same reg class, e.g., single and double on Sparc). llvm-svn: 7327
* isMarkedForSpill() should be const.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7155
* Print out all neighbors in interference graph, not just higher-numbered ones.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7153
* Several fixes to handling of int CC register:Vikram S. Adve2003-07-101-8/+10
| | | | | | | | | | | | | | | | | | | | | (1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. llvm-svn: 7152
* Minor beautification: fold a couple of lines of code.Vikram S. Adve2003-07-021-3/+2
| | | | llvm-svn: 7054
* Remove a ton of extraneous #includesChris Lattner2003-06-222-5/+1
| | | | llvm-svn: 6842
* Included assert.h so that the code compiles under newer versions of GCC.John Criswell2003-06-112-0/+3
| | | | llvm-svn: 6682
* Minor changes.Vikram S. Adve2003-05-311-0/+5
| | | | llvm-svn: 6470
* Extensive changes to the way code generation occurs for functionVikram S. Adve2003-05-312-157/+261
| | | | | | | | | | | | | | call arguments and return values: Now all copy operations before and after a call are generated during selection instead of during register allocation. The values are copied to virtual registers (or to the stack), but in the former case these operands are marked with the correct physical registers according to the calling convention. Although this complicates scheduling and does not work well with live range analysis, it simplifies the machine-dependent part of register allocation. llvm-svn: 6465
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-272-16/+15
| | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341
* Adjust to new interfacesChris Lattner2003-01-152-6/+8
| | | | llvm-svn: 5314
* Move headers aroundChris Lattner2003-01-152-2/+2
| | | | llvm-svn: 5312
* Header is moved into local directoryChris Lattner2003-01-151-3/+2
| | | | llvm-svn: 5311
* Add new methodChris Lattner2003-01-151-0/+1
| | | | llvm-svn: 5309
* #include RegClass.h explicitlyChris Lattner2003-01-154-4/+5
| | | | llvm-svn: 5307
* Remvoe dependency on RegClass.hChris Lattner2003-01-151-3/+4
| | | | llvm-svn: 5306
* Use buildmi not MI ctor directlyChris Lattner2003-01-151-3/+2
| | | | llvm-svn: 5293
* Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> ↵Chris Lattner2003-01-141-1/+1
| | | | | | llvm/CodeGen/FunctionLiveVarInfo.h llvm-svn: 5284
* Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.hChris Lattner2003-01-142-2/+2
| | | | llvm-svn: 5282
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-142-2/+2
| | | | llvm-svn: 5272
* More renamings of Target/Machine*Info to Target/Target*InfoChris Lattner2002-12-294-12/+12
| | | | llvm-svn: 5204
* Rename MachineFrameInfo to TargetFrameInfo.hChris Lattner2002-12-281-1/+1
| | | | llvm-svn: 5199
* Frame info moved out of MachineFunction into a seperate objectChris Lattner2002-12-281-6/+7
| | | | llvm-svn: 5192
* Use higher level methods, don't use TargetInstrDescriptors directly!Chris Lattner2002-10-291-2/+2
| | | | llvm-svn: 4389
* Remove #include, misleading comment, and a typedef used only onceChris Lattner2002-10-291-25/+4
| | | | llvm-svn: 4383
* Inline typedef, eliminate unused methodChris Lattner2002-10-292-24/+12
| | | | llvm-svn: 4382
* Remove long dead #if 0Chris Lattner2002-10-291-4/+0
| | | | llvm-svn: 4381
* Add #includes that were eliminated from headersChris Lattner2002-10-294-1/+14
| | | | llvm-svn: 4380
* De-inline methodsChris Lattner2002-10-291-9/+2
| | | | llvm-svn: 4379
* Remove #includeChris Lattner2002-10-291-1/+0
| | | | llvm-svn: 4378
* Remove unneeded #includeChris Lattner2002-10-291-10/+9
| | | | llvm-svn: 4377
* Remove forward declChris Lattner2002-10-291-1/+0
| | | | llvm-svn: 4376
* Make assertIGNode be private to the InterferenceGraph.cpp fileChris Lattner2002-10-292-29/+26
| | | | llvm-svn: 4375
* Rename some regalloc fieldsChris Lattner2002-10-281-4/+4
| | | | llvm-svn: 4346
* Eliminate usage of MachineBasicBlock::getChris Lattner2002-10-282-103/+82
| | | | llvm-svn: 4344
* Rename the redundant MachineOperand::getOperandType() to ↵Chris Lattner2002-10-282-17/+17
| | | | | | MachineOperand::getType() llvm-svn: 4331
* Add #includes now that MachineInstr.h doesn't include ↵Chris Lattner2002-10-282-0/+2
| | | | | | llvm/Target/MachineInstrInfo.h llvm-svn: 4327
* *** empty log message ***Chris Lattner2002-10-282-2/+0
| | | | llvm-svn: 4323
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