| Commit message (Collapse) | Author | Age | Files | Lines |
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info (since multiple reg types may share the same reg class).
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
llvm-svn: 7329
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llvm-svn: 5312
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llvm-svn: 5307
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llvm-svn: 5204
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llvm-svn: 4380
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llvm-svn: 4263
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debug output.
llvm-svn: 3724
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a vector. This makes asserting on array bounds easier.
llvm-svn: 2731
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-- passing FP arguments to functions with more than 6 arguments
-- passing FP arguments to varargs functions
-- passing FP arguments to functions with no prototypes
-- incorrect coloring for CC registers (both int and FP): interferences
were being completely ignored for int CC and were considered but no
spills were marked for fp CC!
Also some code improvements:
-- better interface to generating machine instr for common cases
(many places still need to be updated to use this interface)
-- annotations on MachineInstr to communicate information from
one codegen phase to another (now used to pass information about
CALL/JMPLCALL operands from selection to register allocation)
-- all sizes and offests in class TargetData are uint64_t instead of uint
llvm-svn: 2642
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llvm-svn: 2397
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llvm-svn: 2252
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llvm-svn: 2177
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llvm-svn: 1503
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llvm-svn: 1500
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llvm-svn: 1499
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Added correct spill candidate selection logic.
llvm-svn: 1493
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llvm-svn: 1253
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is already pushed to stack by a previous call to the same method.
llvm-svn: 1154
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llvm-svn: 1147
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llvm-svn: 847
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generation
llvm-svn: 840
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llvm-svn: 590
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llvm-svn: 580
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