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* [thumb,framelowering] Reset NoVRegs in Thumb1FrameLowering::emitPrologue.Florian Hahn2017-01-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Summary: In this function, virtual registers can be introduced (for example through calls to emitThumbRegPlusImmInReg). doScavengeFrameVirtualRegs will replace those virtual registers with concrete registers later on in PrologEpilogInserter, which sets NoVRegs again. This patch fixes the Codegen/Thumb/segmented-stacks.ll test case which failed with expensive checks. https://llvm.org/bugs/show_bug.cgi?id=27484 Reviewers: rnk, bkramer, olista01 Reviewed By: olista01 Subscribers: llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D28829 llvm-svn: 292372
* TRI: Add hook to pass scavenger during frame eliminationMatt Arsenault2016-11-241-4/+11
| | | | | | | | | | | | The scavenger was not passed if requiresFrameIndexScavenging was enabled. I need to be able to test for the availability of an unallocatable register here, so I can't create a virtual register for it. It might be better to just always use the scavenger and stop creating virtual registers. llvm-svn: 287843
* Modify df_iterator to support post-order actionsDavid Callahan2016-10-051-1/+1
| | | | | | | | | | | | Summary: This makes a change to the state used to maintain visited information for depth first iterator. We know assume a method "completed(...)" which is called after all children of a node have been visited. In all existing cases, this method does nothing so this patch has no functional changes. It will however allow a client to distinguish back from cross edges in a DFS tree. Reviewers: nadav, mehdi_amini, dberlin Subscribers: MatzeB, mzolotukhin, twoh, freik, llvm-commits Differential Revision: https://reviews.llvm.org/D25191 llvm-svn: 283391
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* Revert "RegScavenging: Add scavengeRegisterBackwards()"Matthias Braun2016-08-191-85/+62
| | | | | | | | | | | The ppc64 multistage bot fails on this. This reverts commit r279124. Also Revert "CodeGen: Add/Factor out LiveRegUnits class; NFCI" because it depends on the previous change This reverts commit r279171. llvm-svn: 279199
* RegScavenging: Add scavengeRegisterBackwards()Matthias Braun2016-08-181-62/+85
| | | | | | | | | | | | | | | | Re-apply r276044 with off-by-1 instruction fix for the reload placement. This is a variant of scavengeRegister() that works for enterBasicBlockEnd()/backward(). The benefit of the backward mode is that it is not affected by incomplete kill flags. This patch also changes PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register scavenger in backwards mode. Differential Revision: http://reviews.llvm.org/D21885 llvm-svn: 279124
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-77/+76
| | | | | | | getFrameInfo() never returns nullptr so we should use a reference instead of a pointer. llvm-svn: 277017
* Revert "RegScavenging: Add scavengeRegisterBackwards()"Matthias Braun2016-07-201-81/+62
| | | | | | | | | Reverting this commit for now as it seems to be causing failures on test-suite tests on the clang-ppc64le-linux-lnt bot. This reverts commit r276044. llvm-svn: 276068
* RegScavenging: Add scavengeRegisterBackwards()Matthias Braun2016-07-191-62/+81
| | | | | | | | | | | | | | This is a variant of scavengeRegister() that works for enterBasicBlockEnd()/backward(). The benefit of the backward mode is that it is not affected by incomplete kill flags. This patch also changes PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register scavenger in backwards mode. Differential Revision: http://reviews.llvm.org/D21885 llvm-svn: 276044
* CodeGen: Use MachineInstr& in PrologEpilogInserter, NFCDuncan P. N. Exon Smith2016-07-011-18/+20
| | | | | | | | | Use MachineInstr& over MachineInstr* to avoid implicit iterator to pointer conversions. MachineInstr*-as-nullptr was being used as a flag for whether the for loop terminated normally; I added an explicit `bool` instead. llvm-svn: 274310
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly a mechanical change to make TargetInstrInfo API take MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator) when the argument is expected to be a valid MachineInstr. This is a general API improvement. Although it would be possible to do this one function at a time, that would demand a quadratic amount of churn since many of these functions call each other. Instead I've done everything as a block and just updated what was necessary. This is mostly mechanical fixes: adding and removing `*` and `&` operators. The only non-mechanical change is to split ARMBaseInstrInfo::getOperandLatencyImpl out from ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a `MachineInstr*` which it updated to the instruction bundle leader; now, the latter calls the former either with the same `MachineInstr&` or the bundle leader. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. Note: I updated WebAssembly, Lanai, and AVR (despite being off-by-default) since it turned out to be easy. I couldn't run tests for AVR since llc doesn't link with it turned on. llvm-svn: 274189
* PrologEpilogInserter: Some code cleanup; NFCMatthias Braun2016-06-291-40/+36
| | | | | | | | | - Use range based for - Use the more common variable names MBB and MF for MachineBasicBlock/MachineFunction variables. - Add a few const modifiers llvm-svn: 274187
* NFC; refactor getFrameIndexReferenceFromSPSanjoy Das2016-06-161-11/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: ... into getFrameIndexReferencePreferSP. This change folds the fail-then-retry logic into getFrameIndexReferencePreferSP. There is a non-functional but behaviorial change in WinException -- earlier if `getFrameIndexReferenceFromSP` failed we'd trip an assert, but now we'll silently use the (wrong) offset from the base pointer. I could not write the assert I'd like to write ("FrameReg == StackRegister", like I've done in X86FrameLowering) since there is no easy way to get to the stack register from WinException (happy to be proven wrong here). One solution to this is to add a `bool OnlyStackPointer` parameter to `getFrameIndexReferenceFromSP` that asserts if it could not satisfy its promise of returning an offset from a stack pointer, but that seems overkill. Reviewers: rnk Subscribers: sanjoy, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D21427 llvm-svn: 272938
* Don't force SP-relative addressing for statepointsSanjoy Das2016-06-151-3/+10
| | | | | | | | | | | | | | | | | | | Summary: ... when the offset is not statically known. Prioritize addresses relative to the stack pointer in the stackmap, but fallback gracefully to other modes of addressing if the offset to the stack pointer is not a known constant. Patch by Oscar Blumberg! Reviewers: sanjoy Subscribers: llvm-commits, majnemer, rnk, sanjoy, thanm Differential Revision: http://reviews.llvm.org/D21259 llvm-svn: 272756
* [CodeGen] Fix PrologEpilogInserter to avoid duplicate allocation of SEH structsEtienne Bergeron2016-06-101-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When stack-protection is activated and WinEH exceptions is used, the EHRegNode (exception handling registration) is allocated twice on the stack. This was not breaking anything except loosing space on the stack. ``` D:\src\llvm\examples>llc exc2.ll -debug-only=pei alloc FI(0) at SP[-24] alloc FI(1) at SP[-48] <<-- Allocated alloc FI(1) at SP[-72] <<-- Allocated twice!? alloc FI(2) at SP[-76] alloc FI(4) at SP[-80] alloc FI(3) at SP[-84] ``` Reviewers: rnk, majnemer Subscribers: chrisha, llvm-commits Differential Revision: http://reviews.llvm.org/D21188 llvm-svn: 272426
* [PEI, AArch64] Use empty spaces in stack area for local stack slot allocation.Geoff Berry2016-06-021-5/+122
| | | | | | | | | | | | | | | | | Summary: If the target requests it, use emptry spaces in the fixed and callee-save stack area to allocate local stack objects. AArch64: Change last callee-save reg stack object alignment instead of size to leave a gap to take advantage of above change. Reviewers: t.p.northover, qcolombet, MatzeB Subscribers: rengolin, mcrosier, llvm-commits, aemerson Differential Revision: http://reviews.llvm.org/D20220 llvm-svn: 271527
* PrologEpilogInserter: Avoid an infinite loop when MinCSFrameIndex == 0Justin Bogner2016-05-231-3/+3
| | | | | | | | | | | | | | Before r269750 we did the comparisons in this loop in signed ints so that it DTRT when MinCSFrameIndex was 0. This was changed because it's now possible for MinCSFrameIndex to be UINT_MAX, but that introduced a bug when we were comparing `>= 0` - this is tautological in unsigned. Rework the comparisons here to avoid issues with unsigned wrapping. No test. I couldn't find a way to get any of the StackGrowsUp in-tree targets to reach the code that sets MinCSFrameIndex. llvm-svn: 270492
* Factor PrologEpilogInserter around spilling, frame finalization, and scavengingDerek Schuff2016-05-171-79/+130
| | | | | | | | | | | | | | | PrologEpilogInserter has these 3 phases, which are related, but not all of them are needed by all targets. This patch reorganizes PEI's varous functions around those phases for more clear separation. It also introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true for non-virtual targets. When it is true, all the phases operate as before, and PEI requires the AllVRegsAllocated property on MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and only prolog/epilog insertion/frame finalization is done. Differential Revision: http://reviews.llvm.org/D18366 llvm-svn: 269750
* PrologEpilogInserter: Remove unnecessary dependencyMatthias Braun2016-05-101-2/+0
| | | | llvm-svn: 269010
* [NFC] Header cleanupMehdi Amini2016-04-181-2/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* CodeGen: Clear the MFI's save and restore point after PrologEpilogInserterJustin Bogner2016-04-121-0/+2
| | | | | | | | | | This state is no longer useful and not guaranteed to be valid in later codegen passes. For example, see the added test, which would print a savepoint of %bb.-1 without this change, and crashes with a use-after-free error under ASan if you apply the recycling allocator patch from llvm.org/PR26808. llvm-svn: 266150
* RegisterScavenger: Take a reference as enterBasicBlock() argument.Matthias Braun2016-04-061-2/+2
| | | | | | | Make it obvious that the argument cannot be nullptr. Remove an unnecessary nullptr check in initRegState. llvm-svn: 265511
* Change eliminateCallFramePseudoInstr() to return an iteratorHans Wennborg2016-03-311-9/+1
| | | | | | | | | | | | | | | | | | | | | This will become necessary in a subsequent change to make this method merge adjacent stack adjustments, i.e. it might erase the previous and/or next instruction. It also greatly simplifies the calls to this function from Prolog- EpilogInserter. Previously, that had a bunch of logic to resume iteration after the call; now it just continues with the returned iterator. Note that this changes the behaviour of PEI a little. Previously, it attempted to re-visit the new instruction created by eliminateCallFramePseudoInstr(). That code was added in r36625, but I can't see any reason for it: the new instructions will obviously not be pseudo instructions, they will not have FrameIndex operands, and we have already accounted for the stack adjustment. Differential Revision: http://reviews.llvm.org/D18627 llvm-svn: 265036
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left. With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior. This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones. Reviewers: qcolombet, hfinkel Differential Revision: http://reviews.llvm.org/D18421 llvm-svn: 264593
* CodeGen: use range based for loopSaleem Abdulrasool2016-03-191-5/+4
| | | | | | Convert a loop to use a range based style loop. NFC. llvm-svn: 263884
* [WinEH] Allocate the registration node before the catch objectsDavid Majnemer2016-03-011-0/+12
| | | | | | | | | | | | | | | | | | | | The CatchObjOffset is relative to the end of the EH registration node for 32-bit x86 WinEH targets. A special sentinel value, 0, is used to indicate that no catch object should be initialized. This means that a catch object allocated immediately before the registration node would be assigned a CatchObjOffset of 0, leading the runtime to believe that a catch object should not be initialized. To handle this, allocate the registration node prior to any other frame object. This will ensure that catch objects will not be allocated before the registration node. This fixes PR26757. Differential Revision: http://reviews.llvm.org/D17689 llvm-svn: 262294
* Implemented stack symbol table ordering/packing optimization to improve data ↵Zia Ansari2016-02-151-3/+14
| | | | | | | | locality and code size from SP/FP offset encoding. Differential Revision: http://reviews.llvm.org/D15393 llvm-svn: 260917
* [PrologEpilogInserter] Add some debug output for callee-save frame object ↵Geoff Berry2016-02-011-0/+2
| | | | | | | | | | | | allocation Reviewers: mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16733 llvm-svn: 259367
* Update to use new name alignTo().Rui Ueyama2016-01-141-5/+5
| | | | llvm-svn: 257804
* Support for emitting inline stack probesAndy Ayers2015-11-101-0/+3
| | | | | | | | | | | | | | | | | | For CoreCLR on Windows, stack probes must be emitted as inline sequences that probe successive stack pages between the current stack limit and the desired new stack pointer location. This implements support for the inline expansion on x64. For in-body alloca probes, expansion is done during instruction lowering. For prolog probes, a stub call is initially emitted during prolog creation, and expanded after epilog generation, to avoid complications that arise when introducing new machine basic blocks during prolog and epilog creation. Added a new test case, modified an existing one to exclude non-x64 coreclr (for now). Add test case Fix tests llvm-svn: 252578
* CodeGen: Avoid more ilist iterator implicit conversions, NFCDuncan P. N. Exon Smith2015-10-091-6/+6
| | | | llvm-svn: 249903
* [WinEH] Undo the effect of r249578 for 32-bitReid Kleckner2015-10-071-22/+0
| | | | | | | | | | | | The __CxxFrameHandler3 tables for 32-bit are supposed to hold stack offsets relative to EBP, not ESP. I blindly updated the win-catchpad.ll test case, and immediately noticed that 32-bit catching stopped working. While I'm at it, move the frame index to frame offset WinEH table logic out of PEI. PEI shouldn't have to know about WinEHFuncInfo. I realized we can calculate frame index offsets just fine from the table printer. llvm-svn: 249618
* [WinEH] Fix two minor issues in __CxxFrameHandler3 tablesReid Kleckner2015-10-071-3/+2
| | | | | | | | | | | | There was an off-by-one bug in ip2state tables which manifested when one call immediately preceded the try-range of the next. The return address of the previous call would appear to be within the try range of the next scope, resulting in extra destructors or catches running. We also computed the wrong offset for catch parameter stack objects. The offset should be from RSP, not from RBP. llvm-svn: 249578
* HHVM calling conventions.Maksim Panchenko2015-09-291-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | HHVM calling convention, hhvmcc, is used by HHVM JIT for functions in translated cache. We currently support LLVM back end to generate code for X86-64 and may support other architectures in the future. In HHVM calling convention any GP register could be used to pass and return values, with the exception of R12 which is reserved for thread-local area and is callee-saved. Other than R12, we always pass RBX and RBP as args, which are our virtual machine's stack pointer and frame pointer respectively. When we enter translation cache via hhvmcc function, we expect the stack to be aligned at 16 bytes, i.e. skewed by 8 bytes as opposed to standard ABI alignment. This affects stack object alignment and stack adjustments for function calls. One extra calling convention, hhvm_ccc, is used to call C++ helpers from HHVM's translation cache. It is almost identical to standard C calling convention with an exception of first argument which is passed in RBP (before we use RDI, RSI, etc.) Differential Revision: http://reviews.llvm.org/D12681 llvm-svn: 248832
* PrologueEpilogInserter: Fix missing live-ins when savepoint equals restorepointMatthias Braun2015-09-251-3/+6
| | | | | | | | | | | | | | The algorithm would not modify the live-in list of blocks below the save block point which is correct unless it happens to be a restore point at the same time. Also fixes the benign issue of live-in registers being added twice in some cases. The testcase is based on a test submitted by Kit Barton. Differential Revision: http://reviews.llvm.org/D13176 llvm-svn: 248620
* MachineBasicBlock: Factor out common code into isReturnBlock()Matthias Braun2015-09-251-9/+2
| | | | llvm-svn: 248617
* [PrologEpilogInserter] Minor refactoring.Maksim Panchenko2015-09-191-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D12924 llvm-svn: 248084
* Test commit.Zia Ansari2015-09-171-1/+1
| | | | llvm-svn: 247901
* [WinEH] Rip out the landingpad-based C++ EH state numbering codeReid Kleckner2015-09-161-6/+0
| | | | | | It never really worked, and the new code is working better every day. llvm-svn: 247860
* [WinEH] Pull Adjectives and CatchObj out of the catchpad arg listReid Kleckner2015-09-161-0/+10
| | | | | | | | | | Clang now passes the adjectives as an argument to catchpad. Getting the CatchObj working is simply a matter of threading another static alloca through codegen, first as an alloca, then as a frame index, and finally as a frame offset. llvm-svn: 247844
* Fix typos.Bruce Mitchener2015-09-121-2/+2
| | | | | | | | | | Summary: This fixes a variety of typos in docs, code and headers. Subscribers: jholewinski, sanjoy, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D12626 llvm-svn: 247495
* [WinEH] Emit prologues and epilogues for funcletsReid Kleckner2015-09-081-24/+32
| | | | | | | | | | | | | | | | | | | | | | | | Summary: 32-bit funclets have short prologues that allocate enough stack for the largest call in the whole function. The runtime saves CSRs for the funclet. It doesn't restore CSRs after we finally transfer control back to the parent funciton via a CATCHRET, but that's a separate issue. 32-bit funclets also have to adjust the incoming EBP value, which is what llvm.x86.seh.recoverframe does in the old model. 64-bit funclets need to spill CSRs as normal. For simplicity, this just spills the same set of CSRs as the parent function, rather than trying to compute different CSR sets for the parent function and each funclet. 64-bit funclets also allocate enough stack space for the largest outgoing call frame, like 32-bit. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D12546 llvm-svn: 247092
* MachineRegisterInfo: Remove UsedPhysReg infrastructureMatthias Braun2015-07-141-4/+0
| | | | | | | | | | | | | We have a detailed def/use lists for every physical register in MachineRegisterInfo anyway, so there is little use in maintaining an additional bitset of which ones are used. Removing it frees us from extra book keeping. This simplifies VirtRegMap. Differential Revision: http://reviews.llvm.org/D10911 llvm-svn: 242173
* PrologEpilogInserter: Rewrite API to determine callee save regsiters.Matthias Braun2015-07-141-27/+15
| | | | | | | | | | | | | | | | This changes TargetFrameLowering::processFunctionBeforeCalleeSavedScan(): - Rename the function to determineCalleeSaves() - Pass a bitset of callee saved registers by reference, thus avoiding the function-global PhysRegUsed bitset in MachineRegisterInfo. - Without PhysRegUsed the implementation is fine tuned to not save physcial registers which are only read but never modified. Related to rdar://21539507 Differential Revision: http://reviews.llvm.org/D10909 llvm-svn: 242165
* [ShrinkWrap][PEI] Do not insert epilogue for unreachable blocks.Quentin Colombet2015-07-101-3/+8
| | | | | | | Although this is not incorrect to insert such code, it is useless and it hurts the binary size. llvm-svn: 241946
* MachineInstr: Change return value of getOpcode() to unsigned.Matthias Braun2015-05-181-5/+5
| | | | | | | | | This was previously returning int. However there are no negative opcode numbers and more importantly this was needlessly different from MCInstrDesc::getOpcode() (which even is the value returned here) and SDValue::getOpcode()/SDNode::getOpcode(). llvm-svn: 237611
* [ShrinkWrap] Add (a simplified version) of shrink-wrapping.Quentin Colombet2015-05-051-30/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new pass that computes the safe point to insert the prologue and epilogue of the function. The interest is to find safe points that are cheaper than the entry and exits blocks. As an example and to avoid regressions to be introduce, this patch also implements the required bits to enable the shrink-wrapping pass for AArch64. ** Context ** Currently we insert the prologue and epilogue of the method/function in the entry and exits blocks. Although this is correct, we can do a better job when those are not immediately required and insert them at less frequently executed places. The job of the shrink-wrapping pass is to identify such places. ** Motivating example ** Let us consider the following function that perform a call only in one branch of a if: define i32 @f(i32 %a, i32 %b) { %tmp = alloca i32, align 4 %tmp2 = icmp slt i32 %a, %b br i1 %tmp2, label %true, label %false true: store i32 %a, i32* %tmp, align 4 %tmp4 = call i32 @doSomething(i32 0, i32* %tmp) br label %false false: %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ] ret i32 %tmp.0 } On AArch64 this code generates (removing the cfi directives to ease readabilities): _f: ; @f ; BB#0: stp x29, x30, [sp, #-16]! mov x29, sp sub sp, sp, #16 ; =16 cmp w0, w1 b.ge LBB0_2 ; BB#1: ; %true stur w0, [x29, #-4] sub x1, x29, #4 ; =4 mov w0, wzr bl _doSomething LBB0_2: ; %false mov sp, x29 ldp x29, x30, [sp], #16 ret With shrink-wrapping we could generate: _f: ; @f ; BB#0: cmp w0, w1 b.ge LBB0_2 ; BB#1: ; %true stp x29, x30, [sp, #-16]! mov x29, sp sub sp, sp, #16 ; =16 stur w0, [x29, #-4] sub x1, x29, #4 ; =4 mov w0, wzr bl _doSomething add sp, x29, #16 ; =16 ldp x29, x30, [sp], #16 LBB0_2: ; %false ret Therefore, we would pay the overhead of setting up/destroying the frame only if we actually do the call. ** Proposed Solution ** This patch introduces a new machine pass that perform the shrink-wrapping analysis (See the comments at the beginning of ShrinkWrap.cpp for more details). It then stores the safe save and restore point into the MachineFrameInfo attached to the MachineFunction. This information is then used by the PrologEpilogInserter (PEI) to place the related code at the right place. This pass runs right before the PEI. Unlike the original paper of Chow from PLDI’88, this implementation of shrink-wrapping does not use expensive data-flow analysis and does not need hack to properly avoid frequently executed point. Instead, it relies on dominance and loop properties. The pass is off by default and each target can opt-in by setting the EnableShrinkWrap boolean to true in their derived class of TargetPassConfig. This setting can also be overwritten on the command line by using -enable-shrink-wrap. Before you try out the pass for your target, make sure you properly fix your emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not necessarily the entry block. ** Design Decisions ** 1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but for debugging and clarity I thought it was best to have its own file. 2. Right now, we only support one save point and one restore point. At some point we can expand this to several save point and restore point, the impacted component would then be: - The pass itself: New algorithm needed. - MachineFrameInfo: Hold a list or set of Save/Restore point instead of one pointer. - PEI: Should loop over the save point and restore point. Anyhow, at least for this first iteration, I do not believe this is interesting to support the complex cases. We should revisit that when we motivating examples. Differential Revision: http://reviews.llvm.org/D9210 <rdar://problem/3201744> llvm-svn: 236507
* [WinEH] Run cleanup handlers when an exception is thrownDavid Majnemer2015-03-301-0/+20
| | | | | | | | Generate tables in the .xdata section representing what actions to take when an exception is thrown. This currently fills in state for cleanups, catch handlers are still unfinished. llvm-svn: 233636
* Internalize PEI. NFC.Benjamin Kramer2015-03-191-1/+48
| | | | llvm-svn: 232722
* Replace llvm.frameallocate with llvm.frameescapeReid Kleckner2015-03-051-11/+0
| | | | | | | | | | Turns out it's pretty straightforward and simplifies the implementation. Reviewers: andrew.w.kaylor Differential Revision: http://reviews.llvm.org/D8051 llvm-svn: 231386
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